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/* sis_mm.c -- Private header for Direct Rendering Manager -*- linux-c -*-
 * Created: Mon Jan  4 10:05:05 1999 by sclin@sis.com.tw
 *
 * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
 * All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *    Sung-Ching Lin <sclin@sis.com.tw>
 *
 */

#if defined(__linux__) && defined(CONFIG_FB_SIS)
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
#include <video/sisfb.h>
#else
#include <linux/sisfb.h>
#endif
#endif
#include "drmP.h"
#include "sis_drm.h"
#include "sis_drv.h"
#include "sis_ds.h"

#define MAX_CONTEXT 100
#define VIDEO_TYPE 0
#define AGP_TYPE 1

typedef struct {
	int used;
	int context;
	set_t *sets[2];		/* 0 for video, 1 for AGP */
} sis_context_t;

static sis_context_t global_ppriv[MAX_CONTEXT];

static int add_alloc_set(int context, int type, unsigned int val)
{
	int i, retval = 0;

	for (i = 0; i < MAX_CONTEXT; i++) {
		if (global_ppriv[i].used && global_ppriv[i].context == context) {
			retval = setAdd(global_ppriv[i].sets[type], val);
			break;
		}
	}
	return retval;
}

static int del_alloc_set(int context, int type, unsigned int val)
{
	int i, retval = 0;

	for (i = 0; i < MAX_CONTEXT; i++) {
		if (global_ppriv[i].used && global_ppriv[i].context == context) {
			retval = setDel(global_ppriv[i].sets[type], val);
			break;
		}
	}
	return retval;
}

/* fb management via fb device */
#if defined(__linux__) && defined(CONFIG_FB_SIS)

static int sis_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
	return 0;
}

static int sis_fb_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
	drm_sis_mem_t *fb = data;
	struct sis_memreq req;
	int retval = 0;

	req.size = fb->size;
	sis_malloc(&req);
	if (req.offset) {
		/* TODO */
		fb->offset = req.offset;
		fb->free = req.offset;
		if (!add_alloc_set(fb->context, VIDEO_TYPE, fb->free)) {
			DRM_DEBUG("adding to allocation set fails\n");
			sis_free(req.offset);
			retval = -EINVAL;
		}
	} else {
		fb->offset = 0;
		fb->size = 0;
		fb->free = 0;
	}

	DRM_DEBUG("alloc fb, size = %d, offset = %ld\n", fb->size, req.offset);

	return retval;
}

static int sis_fb_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
	drm_sis_mem_t fb;
	int retval = 0;

	if (!fb->free)
		return -EINVAL;

	if (!del_alloc_set(fb->context, VIDEO_TYPE, fb->free))
		retval = -EINVAL;
	sis_free(fb->free);

	DRM_DEBUG("free fb, offset = 0x%lx\n", fb->free);

	return retval;
}

#else

/* Called by the X Server to initialize the FB heap.  Allocations will fail
 * unless this is called.  Offset is the beginning of the heap from the
 * framebuffer offset (MaxXFBMem in XFree86).
 *
 * Memory layout according to Thomas Winischofer:
 * |------------------|DDDDDDDDDDDDDDDDDDDDDDDDDDDDD|HHHH|CCCCCCCCCCC|
 *
 *    X driver/sisfb                                  HW-   Command-
 *  framebuffer memory           DRI heap           Cursor   queue
 */
static int sis_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
	drm_sis_private_t *dev_priv = dev->dev_private;
	drm_sis_fb_t *fb = data;

	if (dev_priv == NULL) {
		dev->dev_private = drm_calloc(1, sizeof(drm_sis_private_t),
					      DRM_MEM_DRIVER);
		dev_priv = dev->dev_private;
		if (dev_priv == NULL)
			return ENOMEM;
	}

	if (dev_priv->FBHeap != NULL)
		return -EINVAL;

	dev_priv->FBHeap = mmInit(fb->offset, fb->size);

	DRM_DEBUG("offset = %u, size = %u", fb->offset, fb->size);

	return 0;
}

static int sis_fb_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
	drm_sis_private_t *dev_priv = dev->dev_private;
	drm_sis_mem_t *fb = data;
	PMemBlock block;
	int retval = 0;

	if (dev_priv == NULL || dev_priv->FBHeap == NULL)
		return -EINVAL;

	block = mmAllocMem(dev_priv->FBHeap, fb->size, 0, 0);
	if (block) {
		/* TODO */
		fb->offset = block->ofs;
		fb->free = (unsigned long)block;
		if (!add_alloc_set(fb->context, VIDEO_TYPE, fb->free)) {
			DRM_DEBUG("adding to allocation set fails\n");
			mmFreeMem((PMemBlock) fb->free);
			retval = -EINVAL;
		}
	} else {
		fb->offset = 0;
		fb->size = 0;
		fb->free = 0;
	}

	DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb->size, fb->offset);

	return retval;
}

static int sis_fb_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
	drm_sis_private_t *dev_priv = dev->dev_private;
	drm_sis_mem_t *fb = data;

	if (dev_priv == NULL || dev_priv->FBHeap == NULL)
		return -EINVAL;

	if (!mmBlockInHeap(dev_priv->FBHeap, (PMemBlock) fb->free))
		return -EINVAL;

	if (!del_alloc_set(fb->context, VIDEO_TYPE, fb->free))
		return -EINVAL;
	mmFreeMem((PMemBlock) fb->free);

	DRM_DEBUG("free fb, free = 0x%lx\n", fb->free);

	return 0;
}

#endif

/* agp memory management */

static int sis_ioctl_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
	drm_sis_private_t *dev_priv = dev->dev_private;
	drm_sis_agp_t *agp = data;

	if (dev_priv == NULL) {
		dev->dev_private = drm_calloc(1, sizeof(drm_sis_private_t),
					      DRM_MEM_DRIVER);
		dev_priv = dev->dev_private;
		if (dev_priv == NULL)
			return ENOMEM;
	}

	if (dev_priv->AGPHeap != NULL)
		return -EINVAL;

	dev_priv->AGPHeap = mmInit(agp->offset, agp->size);

	DRM_DEBUG("offset = %u, size = %u", agp->offset, agp->size);

	return 0;
}

static int sis_ioctl_agp_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
	drm_sis_private_t *dev_priv = dev->dev_private;
	drm_sis_mem_t *agp = data;
	PMemBlock block;
	int retval = 0;

	if (dev_priv == NULL || dev_priv->AGPHeap == NULL)
		return -EINVAL;

	block = mmAllocMem(dev_priv->AGPHeap, agp->size, 0, 0);
	if (block) {
		/* TODO */
		agp->offset = block->ofs;
		agp->free = (unsigned long)block;
		if (!add_alloc_set(agp->context, AGP_TYPE, agp->free)) {
			DRM_DEBUG("adding to allocation set fails\n");
			mmFreeMem((PMemBlock) agp->free);
			retval = -1;
		}
	} else {
		agp->offset = 0;
		agp->size = 0;
		agp->free = 0;
	}

	DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp->size,
	    agp->offset);

	return retval;
}

static int sis_ioctl_agp_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
	drm_sis_private_t *dev_priv = dev->dev_private;
	drm_sis_mem_t *agp = data;

	if (dev_priv == NULL || dev_priv->AGPHeap == NULL)
		return -EINVAL;

	if (!mmBlockInHeap(dev_priv->AGPHeap, (PMemBlock) agp->free))
		return -EINVAL;

	mmFreeMem((PMemBlock) agp->free);
	if (!del_alloc_set(agp->context, AGP_TYPE, agp->free))
		return -EINVAL;

	DRM_DEBUG("free agp, free = 0x%lx\n", agp->free);

	return 0;
}

int sis_init_context(struct drm_device *dev, int context)
{
	int i;

	for (i = 0; i < MAX_CONTEXT; i++) {
		if (global_ppriv[i].used &&
		    (global_ppriv[i].context == context))
			break;
	}

	if (i >= MAX_CONTEXT) {
		for (i = 0; i < MAX_CONTEXT; i++) {
			if (!global_ppriv[i].used) {
				global_ppriv[i].context = context;
				global_ppriv[i].used = 1;
				global_ppriv[i].sets[0] = setInit();
				global_ppriv[i].sets[1] = setInit();
				DRM_DEBUG("init allocation set, socket=%d, "
					  "context = %d\n", i, context);
				break;
			}
		}
		if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) ||
		    (global_ppriv[i].sets[1] == NULL)) {
			return 0;
		}
	}

	return 1;
}

int sis_final_context(struct drm_device *dev, int context)
{
	int i;

	for (i = 0; i < MAX_CONTEXT; i++) {
		if (global_ppriv[i].used &&
		    (global_ppriv[i].context == context))
			break;
	}

	if (i < MAX_CONTEXT) {
		set_t *set;
		ITEM_TYPE item;
		int retval;

		DRM_DEBUG("find socket %d, context = %d\n", i, context);

		/* Video Memory */
		set = global_ppriv[i].sets[0];
		retval = setFirst(set, &item);
		while (retval) {
			DRM_DEBUG("free video memory 0x%lx\n", item);
#if defined(__linux__) && defined(CONFIG_FB_SIS)
			sis_free(item);
#else
			mmFreeMem((PMemBlock) item);
#endif
			retval = setNext(set, &item);
		}
		setDestroy(set);

		/* AGP Memory */
		set = global_ppriv[i].sets[1];
		retval = setFirst(set, &item);
		while (retval) {
			DRM_DEBUG("free agp memory 0x%lx\n", item);
			mmFreeMem((PMemBlock) item);
			retval = setNext(set, &item);
		}
		setDestroy(set);

		global_ppriv[i].used = 0;
	}

	return 1;
}

drm_ioctl_desc_t sis_ioctls[] = {
	DRM_IOCTL_DEF(DRM_SIS_FB_ALLOC, sis_fb_alloc, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_SIS_FB_FREE, sis_fb_free, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_SIS_AGP_INIT, sis_ioctl_agp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_SIS_AGP_ALLOC, sis_ioctl_agp_alloc, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_SIS_AGP_FREE, sis_ioctl_agp_free, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_SIS_FB_INIT, sis_fb_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY)
};

int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls);
class="hl opt">; /** Returned pointer the data was mapped at */ uint64_t addr_ptr; /* void *, but pointers are not 32/64 compatible */ }; struct drm_i915_gem_set_domain { /** Handle for the object */ uint32_t handle; /** New read domains */ uint32_t read_domains; /** New write domain */ uint32_t write_domain; }; struct drm_i915_gem_sw_finish { /** Handle for the object */ uint32_t handle; }; struct drm_i915_gem_relocation_entry { /** * Handle of the buffer being pointed to by this relocation entry. * * It's appealing to make this be an index into the mm_validate_entry * list to refer to the buffer, but this allows the driver to create * a relocation list for state buffers and not re-write it per * exec using the buffer. */ uint32_t target_handle; /** * Value to be added to the offset of the target buffer to make up * the relocation entry. */ uint32_t delta; /** Offset in the buffer the relocation entry will be written into */ uint64_t offset; /** * Offset value of the target buffer that the relocation entry was last * written as. * * If the buffer has the same offset as last time, we can skip syncing * and writing the relocation. This value is written back out by * the execbuffer ioctl when the relocation is written. */ uint64_t presumed_offset; /** * Target memory domains read by this operation. */ uint32_t read_domains; /** * Target memory domains written by this operation. * * Note that only one domain may be written by the whole * execbuffer operation, so that where there are conflicts, * the application will get -EINVAL back. */ uint32_t write_domain; }; /** @{ * Intel memory domains * * Most of these just align with the various caches in * the system and are used to flush and invalidate as * objects end up cached in different domains. */ /** CPU cache */ #define I915_GEM_DOMAIN_CPU 0x00000001 /** Render cache, used by 2D and 3D drawing */ #define I915_GEM_DOMAIN_RENDER 0x00000002 /** Sampler cache, used by texture engine */ #define I915_GEM_DOMAIN_SAMPLER 0x00000004 /** Command queue, used to load batch buffers */ #define I915_GEM_DOMAIN_COMMAND 0x00000008 /** Instruction cache, used by shader programs */ #define I915_GEM_DOMAIN_INSTRUCTION 0x00000010 /** Vertex address cache */ #define I915_GEM_DOMAIN_VERTEX 0x00000020 /** GTT domain - aperture and scanout */ #define I915_GEM_DOMAIN_GTT 0x00000040 /** @} */ struct drm_i915_gem_exec_object { /** * User's handle for a buffer to be bound into the GTT for this * operation. */ uint32_t handle; /** Number of relocations to be performed on this buffer */ uint32_t relocation_count; /** * Pointer to array of struct drm_i915_gem_relocation_entry containing * the relocations to be performed in this buffer. */ uint64_t relocs_ptr; /** Required alignment in graphics aperture */ uint64_t alignment; /** * Returned value of the updated offset of the object, for future * presumed_offset writes. */ uint64_t offset; }; struct drm_i915_gem_execbuffer { /** * List of buffers to be validated with their relocations to be * performend on them. * * This is a pointer to an array of struct drm_i915_gem_validate_entry. * * These buffers must be listed in an order such that all relocations * a buffer is performing refer to buffers that have already appeared * in the validate list. */ uint64_t buffers_ptr; uint32_t buffer_count; /** Offset in the batchbuffer to start execution from. */ uint32_t batch_start_offset; /** Bytes used in batchbuffer from batch_start_offset */ uint32_t batch_len; uint32_t DR1; uint32_t DR4; uint32_t num_cliprects; uint64_t cliprects_ptr; /* struct drm_clip_rect *cliprects */ }; struct drm_i915_gem_pin { /** Handle of the buffer to be pinned. */ uint32_t handle; uint32_t pad; /** alignment required within the aperture */ uint64_t alignment; /** Returned GTT offset of the buffer. */ uint64_t offset; }; struct drm_i915_gem_unpin { /** Handle of the buffer to be unpinned. */ uint32_t handle; uint32_t pad; }; struct drm_i915_gem_busy { /** Handle of the buffer to check for busy */ uint32_t handle; /** Return busy status (1 if busy, 0 if idle) */ uint32_t busy; }; #define I915_TILING_NONE 0 #define I915_TILING_X 1 #define I915_TILING_Y 2 #define I915_BIT_6_SWIZZLE_NONE 0 #define I915_BIT_6_SWIZZLE_9 1 #define I915_BIT_6_SWIZZLE_9_10 2 #define I915_BIT_6_SWIZZLE_9_11 3 #define I915_BIT_6_SWIZZLE_9_10_11 4 /* Not seen by userland */ #define I915_BIT_6_SWIZZLE_UNKNOWN 5 struct drm_i915_gem_set_tiling { /** Handle of the buffer to have its tiling state updated */ uint32_t handle; /** * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X, * I915_TILING_Y). * * This value is to be set on request, and will be updated by the * kernel on successful return with the actual chosen tiling layout. * * The tiling mode may be demoted to I915_TILING_NONE when the system * has bit 6 swizzling that can't be managed correctly by GEM. * * Buffer contents become undefined when changing tiling_mode. */ uint32_t tiling_mode; /** * Stride in bytes for the object when in I915_TILING_X or * I915_TILING_Y. */ uint32_t stride; /** * Returned address bit 6 swizzling required for CPU access through * mmap mapping. */ uint32_t swizzle_mode; }; struct drm_i915_gem_get_tiling { /** Handle of the buffer to get tiling state for. */ uint32_t handle; /** * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X, * I915_TILING_Y). */ uint32_t tiling_mode; /** * Returned address bit 6 swizzling required for CPU access through * mmap mapping. */ uint32_t swizzle_mode; }; #endif /* _I915_DRM_H_ */