intel/tests/gen5-3d.batch.sh


1

test-batch.sh
#include <sys/param.h>
#include <sys/queue.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <sys/conf.h>
#include <sys/stat.h>
#include <sys/proc.h>
#include <sys/lock.h>
#include <sys/fcntl.h>
#include <sys/uio.h>
#include <sys/filio.h>
#include <sys/sysctl.h>
#include <sys/select.h>
#include <sys/device.h>
#include <sys/mman.h>
#include <uvm/uvm.h>
#include <sys/vnode.h>
#include <sys/poll.h>
/* For TIOCSPGRP/TIOCGPGRP */
#include <sys/ttycom.h>

#include <uvm/uvm.h>

#include <machine/pmap.h>
#include <machine/bus.h>
#include <sys/resourcevar.h>
#include <machine/sysarch.h>
#include <machine/mtrr.h>

#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
 
#include "drmvar.h"

#define __REALLY_HAVE_AGP	__HAVE_AGP

#define __REALLY_HAVE_MTRR	0
#define __REALLY_HAVE_SG	0

#if __REALLY_HAVE_AGP
#include <dev/pci/agpvar.h>
#include <sys/agpio.h>
#endif

#define device_t struct device *
extern struct cfdriver DRM(_cd);

#if DRM_DEBUG
#undef  DRM_DEBUG_CODE
#define DRM_DEBUG_CODE 2
#endif
#undef DRM_DEBUG

#define DRM_TIME_SLICE	      (hz/20)  /* Time slice for GLXContexts	  */

#define DRM_DEV_MODE	(S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
#define DRM_DEV_UID	0
#define DRM_DEV_GID	0
#define CDEV_MAJOR	90

#define DRM_CURPROC		curproc
#define DRM_STRUCTPROC	struct proc
#define DRM_SPINTYPE		struct simplelock
#define DRM_SPININIT(l,name)	simple_lock_init(&l)
#define DRM_SPINLOCK(l)	simple_lock(l)
#define DRM_SPINUNLOCK(u)	simple_unlock(u);
#define DRM_CURRENTPID       curproc->p_pid

#define DRM_IOCTL_ARGS		dev_t kdev, u_long cmd, caddr_t data, int flags, DRM_STRUCTPROC *p
#define DRM_LOCK		lockmgr(&dev->dev_lock, LK_EXCLUSIVE, NULL)
#define DRM_UNLOCK 		lockmgr(&dev->dev_lock, LK_RELEASE, NULL)
#define DRM_SUSER(p)		suser(p->p_ucred, &p->p_acflag)
#define DRM_TASKQUEUE_ARGS	void *dev, int pending
#define DRM_IRQ_ARGS		void *device
#define DRM_DEVICE		drm_device_t *dev = device_lookup(&DRM(_cd), minor(kdev))
#define DRM_MALLOC(size)	malloc( size, DRM(M_DRM), M_NOWAIT )
#define DRM_FREE(pt)		free( pt, DRM(M_DRM) )
#define DRM_VTOPHYS(addr)	vtophys(addr)
#define DRM_READ8(addr)	*((volatile char *)(addr))
#define DRM_READ32(addr)	*((volatile long *)(addr))
#define DRM_WRITE8(addr, val)	*((volatile char *)(addr)) = (val)
#define DRM_WRITE32(addr, val)	*((volatile long *)(addr)) = (val)
#define DRM_AGP_FIND_DEVICE()

#define DRM_PRIV					\
	drm_file_t	*priv	= (drm_file_t *) DRM(find_file_by_proc)(dev, p); \
	if (!priv) {						\
		DRM_DEBUG("can't find authenticator\n");	\
		return EINVAL;					\
	}

#define DRM_UDELAY( udelay )					\
do {								\
	struct timeval tv1, tv2;				\
	microtime(&tv1);					\
	do {							\
		microtime(&tv2);				\
	}							\
	while (((tv2.tv_sec-tv1.tv_sec)*1000000 + tv2.tv_usec - tv1.tv_usec) < udelay ); \
} while (0)

#define DRM_GETSAREA()					\
do {								\
	drm_map_list_entry_t *listentry;			\
	TAILQ_FOREACH(listentry, dev->maplist, link) {		\
		drm_map_t *map = listentry->map;		\
		if (map->type == _DRM_SHM &&			\
			map->flags & _DRM_CONTAINS_LOCK) {	\
			dev_priv->sarea = map;			\
			break;					\
		}						\
	}							\
} while (0)

#define return DRM_ERR(v)	return v;
#define DRM_ERR(v)		v

#define DRM_COPY_TO_USER_IOCTL(arg1, arg2, arg3) \
	*arg1 = arg2
#define DRM_COPY_FROM_USER_IOCTL(arg1, arg2, arg3) \
	arg1 = *arg2
#define DRM_COPY_TO_USER(arg1, arg2, arg3) \
	copyout(arg2, arg1, arg3)
#define DRM_COPY_FROM_USER(arg1, arg2, arg3) \
	copyin(arg2, arg1, arg3)

#define DRM_READMEMORYBARRIER \
{												\
   	int xchangeDummy;									\
	DRM_DEBUG("%s\n", __FUNCTION__);							\
   	__asm__ volatile(" push %%eax ; xchg %%eax, %0 ; pop %%eax" : : "m" (xchangeDummy));	\
   	__asm__ volatile(" push %%eax ; push %%ebx ; push %%ecx ; push %%edx ;"			\
			 " movl $0,%%eax ; cpuid ; pop %%edx ; pop %%ecx ; pop %%ebx ;"		\
			 " pop %%eax" : /* no outputs */ :  /* no inputs */ );			\
} while (0);

#define DRM_WRITEMEMORYBARRIER DRM_READMEMORYBARRIER

#define DRM_WAKEUP(w) wakeup(w)
#define DRM_WAKEUP_INT(w) wakeup(w)

#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)

typedef struct drm_chipinfo
{
	int vendor;
	int device;
	int supported;
	char *name;
} drm_chipinfo_t;

typedef u_int32_t dma_addr_t;
typedef volatile u_int32_t atomic_t;
typedef u_int32_t cycles_t;
typedef u_int32_t spinlock_t;
typedef u_int32_t u32;
typedef u_int16_t u16;
typedef u_int8_t u8;
typedef dev_type_ioctl(d_ioctl_t);
typedef vaddr_t vm_offset_t;

#define atomic_set(p, v)	(*(p) = (v))
#define atomic_read(p)		(*(p))
#define atomic_inc(p)		atomic_add_int(p, 1)
#define atomic_dec(p)		atomic_subtract_int(p, 1)
#define atomic_add(n, p)	atomic_add_int(p, n)
#define atomic_sub(n, p)	atomic_subtract_int(p, n)

/* FIXME: Is NetBSD's kernel non-reentrant? */
#define atomic_add_int(p, v)      *(p) += v
#define atomic_subtract_int(p, v) *(p) -= v
#define atomic_set_int(p, bits)   *(p) |= (bits)
#define atomic_clear_int(p, bits) *(p) &= ~(bits)

/* Fake this */
static __inline atomic_t
test_and_set_bit(int b, atomic_t *p)
{
	int s = splhigh();
	unsigned int m = 1<<b;
	unsigned int r = *p & m;
	*p |= m;
	splx(s);
	return r;
}

static __inline void
clear_bit(int b, atomic_t *p)
{
    atomic_clear_int(p + (b >> 5), 1 << (b & 0x1f));
}

static __inline void
set_bit(int b, atomic_t *p)
{