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path: root/shared-core/i915_irq.c
AgeCommit message (Expand)Author
2006-08-29Checkpoint commit. Buffer object flags and IOCTL argument list.Thomas Hellstrom
2006-08-21i915 fence object driver implementing 2 fence object types:Thomas Hellstrom
2006-08-10i965 code and Linux coding style < 0Dave Airlie
2006-08-08Add support for Intel i965G chipsets.Alan Hourihane
2006-06-22Remove spurious debug messages from i915 vblank config pathsKeith Packard
2006-06-21i915: Save vblank pipe configuration to restore on resumeKeith Packard
2006-06-19Add i915 ioctls to configure pipes for vblank interrupt.Keith Packard
2006-03-25radeon fix up the PCI ids for new memory map like the kernel one.. notDave Airlie
2006-02-18clear i915 interrupts sources on server exitDave Airlie
2006-02-09Update the hardware breadcrumb in the sarea on irq reception so thatKeith Whitwell
2005-12-28Add vblank support to i915 DRM..Dave Airlie
2005-11-28Assert an MIT copyright on sis_drm.h, since one was lacking and I createdEric Anholt
2005-07-27Correct a couple of descriptions of files in comments (were justEric Anholt
2005-06-06Fix copyrightsAlan Hourihane
2005-02-01make functions static in i915, remove unused functionsDave Airlie
2004-11-11patch from bug 1803 - will try and push to kernel soonDave Airlie
2004-09-30Lindent of core build. Drivers checked for no binary diffs. A few filesJon Smirl
2004-09-27First check in for DRM that splits core from personality modulesJon Smirl
2004-08-27run i915 through lindentDave Airlie
2004-08-27__NO_VERSION__ hasn't been needed since 2.3 days ditch it...Dave Airlie
2004-08-24Merged drmfntbl-0-0-2Dave Airlie
2004-07-25sync up with current 2.6 kernel bk tree - mostly __user annotationsDave Airlie
2004-06-10i915.o drm driverKeith Whitwell
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-06 06:58:58 +0000
******************/ #ifndef _XGI_DRM_H_ #define _XGI_DRM_H_ #include <linux/types.h> #include <asm/ioctl.h> struct drm_xgi_sarea { __u16 device_id; __u16 vendor_id; char device_name[32]; unsigned int scrn_start; unsigned int scrn_xres; unsigned int scrn_yres; unsigned int scrn_bpp; unsigned int scrn_pitch; }; struct xgi_bootstrap { /** * Size of PCI-e GART range in megabytes. */ struct drm_map gart; }; enum xgi_mem_location { XGI_MEMLOC_NON_LOCAL = 0, XGI_MEMLOC_LOCAL = 1, XGI_MEMLOC_INVALID = 0x7fffffff }; struct xgi_mem_alloc { /** * Memory region to be used for allocation. * * Must be one of XGI_MEMLOC_NON_LOCAL or XGI_MEMLOC_LOCAL. */ unsigned int location; /** * Number of bytes request. * * On successful allocation, set to the actual number of bytes * allocated. */ unsigned int size; /** * Address of the memory from the graphics hardware's point of view. */ __u32 hw_addr; /** * Offset of the allocation in the mapping. */ __u32 offset; /** * Magic handle used to release memory. * * See also DRM_XGI_FREE ioctl. */ __u32 index; }; enum xgi_batch_type { BTYPE_2D = 0, BTYPE_3D = 1, BTYPE_FLIP = 2, BTYPE_CTRL = 3, BTYPE_NONE = 0x7fffffff }; struct xgi_cmd_info { __u32 type; __u32 hw_addr; __u32 size; __u32 id; }; struct xgi_state_info { unsigned int _fromState; unsigned int _toState; }; /* * Ioctl definitions */ #define DRM_XGI_BOOTSTRAP 0 #define DRM_XGI_ALLOC 1 #define DRM_XGI_FREE 2 #define DRM_XGI_SUBMIT_CMDLIST 3 #define DRM_XGI_STATE_CHANGE 4 #define XGI_IOCTL_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_BOOTSTRAP, struct xgi_bootstrap) #define XGI_IOCTL_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_ALLOC, struct xgi_mem_alloc) #define XGI_IOCTL_FREE DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_FREE, __u32) #define XGI_IOCTL_SUBMIT_CMDLIST DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_SUBMIT_CMDLIST, struct xgi_cmd_info) #define XGI_IOCTL_STATE_CHANGE DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_STATE_CHANGE, struct xgi_state_info) #endif /* _XGI_DRM_H_ */
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-06 06:58:58 +0000