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path: root/linux-core/tdfx_drv.c
AgeCommit message (Expand)Author
2002-07-05merged bsd-3-0-0-branchAlan Hourihane
2001-08-11new multihead code was missing Voodoo3 2000 and Voodoo4 support.Alan Hourihane
2001-08-08Update to the code I sent Linus and Alan this morning. Added some missingJeff Hartmann
2001-07-30Merge the multihead-1-0-0 branch into the trunk, with the exception of theDavid Dawes
2001-07-23Fixes that allow the modules to be built into the kernelJeff Hartmann
2001-07-18Add module version name at a lower layer of the code, allows things to beJeff Hartmann
2001-07-16Added version string to the end of the kernel module name. This allowsJeff Hartmann
2001-03-07surround agp calls in drm_memory with __REALLY_HAVE_AGP instead ofAlan Hourihane
2001-02-16- Clean up the way customization of the templates is done.Gareth Hughes
2001-02-15- Fix up merge.Gareth Hughes
2001-02-15Merge mga-1-0-0-branch into trunk.Gareth Hughes
2001-01-08Merged tdfx-3-0-0Nathan Hand
2000-11-15Sync with Linux 2.4.0-test11-pre5 Provide backward compatibility testedRik Faith
2000-09-29Audit calls to schedule() Remove tags from files shared with Linux kernelRik Faith
2000-09-27Merged the mga-lock-debug-0-2-0-branch with the trunk. This includesJeff Hartmann
2000-09-24commit xfree86 4.0.1d-pre updateAlan Hourihane
2000-09-10Sync with 2.4.0-test8 kernel.Gareth Hughes
2000-09-06Sync with 2.4.0-test8-pre5 kernel.Gareth Hughes
2000-08-26Sync with Linux 2.4.0-test7 Add signal blocking support to all driversRik Faith
2000-08-08Sync with Linux 2.4.0-test6-pre8Rik Faith
2000-08-04Sync with Linux 2.4.0-test6-pre2Rik Faith
2000-07-21Revert some changes and try alternative way to clean up AGP handling.Rik Faith
2000-07-21Changes to make AGP optional for in-kernel buildsRik Faith
2000-07-20More fixups for kernel build: EXPORT_SYMTAB warning removalRik Faith
2000-07-20Fix signature for *_options functionRik Faith
2000-07-20Added support for building as modules or as part of monolithic kernelRik Faith
2000-07-19Bump driver dates and add descriptionsRik Faith
2000-07-19Sync with Linux 2.4.0-test4 kernelRik Faith
2000-06-13Unify code with kernel: Change some spacing in comments Add #includeRik Faith
2000-06-08Merged glxmisc-3-0-0Brian Paul
2000-04-04Merged mga branch with trunkJeff Hartmann
2000-03-16Merge with 4.0Jeff Hartmann
2000-02-223.9.18 mergeKevin E Martin
2000-01-12Add a drm_poll function to the tdfx driver. This fixes the problem withDaryll Strauss
2000-01-06Import of XFree86 3.9.17Rik Faith
1999-12-05First DRI release of 3dfx driver.Daryll Strauss
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#define NV03_BOOT_0                                        0x00100000
#    define NV03_BOOT_0_RAM_AMOUNT                         0x00000003
#    define NV03_BOOT_0_RAM_AMOUNT_8MB                     0x00000000
#    define NV03_BOOT_0_RAM_AMOUNT_2MB                     0x00000001
#    define NV03_BOOT_0_RAM_AMOUNT_4MB                     0x00000002
#    define NV03_BOOT_0_RAM_AMOUNT_8MB_SDRAM               0x00000003
#    define NV04_BOOT_0_RAM_AMOUNT_32MB                    0x00000000
#    define NV04_BOOT_0_RAM_AMOUNT_4MB                     0x00000001
#    define NV04_BOOT_0_RAM_AMOUNT_8MB                     0x00000002
#    define NV04_BOOT_0_RAM_AMOUNT_16MB                    0x00000003

#define NV04_FIFO_DATA                                     0x0010020c
#    define NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK              0xfff00000
#    define NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT             20

#define NV_RAMIN                                           0x00700000

#define NV_RAMHT_HANDLE_OFFSET                             0
#define NV_RAMHT_CONTEXT_OFFSET                            4
#    define NV_RAMHT_CONTEXT_VALID                         (1<<31)
#    define NV_RAMHT_CONTEXT_CHANNEL_SHIFT                 24
#    define NV_RAMHT_CONTEXT_ENGINE_SHIFT                  16
#        define NV_RAMHT_CONTEXT_ENGINE_SOFTWARE           0
#        define NV_RAMHT_CONTEXT_ENGINE_GRAPHICS           1
#    define NV_RAMHT_CONTEXT_INSTANCE_SHIFT                0
#    define NV40_RAMHT_CONTEXT_CHANNEL_SHIFT               23
#    define NV40_RAMHT_CONTEXT_ENGINE_SHIFT                20
#    define NV40_RAMHT_CONTEXT_INSTANCE_SHIFT              0

/* DMA object defines */
#define NV_DMA_ACCESS_RW 0
#define NV_DMA_ACCESS_RO 1
#define NV_DMA_ACCESS_WO 2
#define NV_DMA_TARGET_VIDMEM 0
#define NV_DMA_TARGET_PCI    2
#define NV_DMA_TARGET_AGP    3
/*The following is not a real value used by nvidia cards, it's changed by nouveau_object_dma_create*/
#define NV_DMA_TARGET_PCI_NONLINEAR   8

/* Some object classes we care about in the drm */
#define NV_CLASS_DMA_FROM_MEMORY                           0x00000002
#define NV_CLASS_DMA_TO_MEMORY                             0x00000003
#define NV_CLASS_NULL                                      0x00000030
#define NV_CLASS_DMA_IN_MEMORY                             0x0000003D

#define NV03_USER(i)                             (0x00800000+(i*NV03_USER_SIZE))
#define NV03_USER__SIZE                                                       16
#define NV10_USER__SIZE                                                       32
#define NV03_USER_SIZE                                                0x00010000
#define NV03_USER_DMA_PUT(i)                     (0x00800040+(i*NV03_USER_SIZE))
#define NV03_USER_DMA_PUT__SIZE                                               16
#define NV10_USER_DMA_PUT__SIZE                                               32
#define NV03_USER_DMA_GET(i)                     (0x00800044+(i*NV03_USER_SIZE))
#define NV03_USER_DMA_GET__SIZE                                               16
#define NV10_USER_DMA_GET__SIZE                                               32
#define NV03_USER_REF_CNT(i)                     (0x00800048+(i*NV03_USER_SIZE))
#define NV03_USER_REF_CNT__SIZE                                               16
#define NV10_USER_REF_CNT__SIZE                                               32

#define NV40_USER(i)                             (0x00c00000+(i*NV40_USER_SIZE))
#define NV40_USER_SIZE                                                0x00001000
#define NV40_USER_DMA_PUT(i)                     (0x00c00040+(i*NV40_USER_SIZE))
#define NV40_USER_DMA_PUT__SIZE                                               32
#define NV40_USER_DMA_GET(i)                     (0x00c00044+(i*NV40_USER_SIZE))
#define NV40_USER_DMA_GET__SIZE                                               32
#define NV40_USER_REF_CNT(i)                     (0x00c00048+(i*NV40_USER_SIZE))
#define NV40_USER_REF_CNT__SIZE                                               32

#define NV50_USER(i)                             (0x00c00000+(i*NV50_USER_SIZE))
#define NV50_USER_SIZE                                                0x00002000
#define NV50_USER_DMA_PUT(i)                     (0x00c00040+(i*NV50_USER_SIZE))
#define NV50_USER_DMA_PUT__SIZE                                              128
#define NV50_USER_DMA_GET(i)                     (0x00c00044+(i*NV50_USER_SIZE))
#define NV50_USER_DMA_GET__SIZE                                              128
/*XXX: I don't think this actually exists.. */
#define NV50_USER_REF_CNT(i)                     (0x00c00048+(i*NV50_USER_SIZE))
#define NV50_USER_REF_CNT__SIZE                                              128

#define NV03_FIFO_SIZE                                     0x8000UL

#define NV03_PMC_BOOT_0                                    0x00000000
#define NV03_PMC_BOOT_1                                    0x00000004
#define NV03_PMC_INTR_0                                    0x00000100
#    define NV_PMC_INTR_0_PFIFO_PENDING                       (1<< 8)
#    define NV_PMC_INTR_0_PGRAPH_PENDING                      (1<<12)
#    define NV_PMC_INTR_0_NV50_I2C_PENDING                  (1<<21)
#    define NV_PMC_INTR_0_CRTC0_PENDING                       (1<<24)
#    define NV_PMC_INTR_0_CRTC1_PENDING                       (1<<25)
#    define NV_PMC_INTR_0_NV50_DISPLAY_PENDING           (1<<26)
#    define NV_PMC_INTR_0_CRTCn_PENDING                       (3<<24)
#define NV03_PMC_INTR_EN_0                                 0x00000140
#    define NV_PMC_INTR_EN_0_MASTER_ENABLE                    (1<< 0)
#define NV03_PMC_ENABLE                                    0x00000200
#    define NV_PMC_ENABLE_PFIFO                               (1<< 8)
#    define NV_PMC_ENABLE_PGRAPH                              (1<<12)
/* Disabling the below bit breaks newer (G7X only?) mobile chipsets,
 * the card will hang early on in the X init process.
 */
#    define NV_PMC_ENABLE_UNK13                               (1<<13)
#define NV40_PMC_1700                                      0x00001700
#define NV40_PMC_1704                                      0x00001704
#define NV40_PMC_1708                                      0x00001708
#define NV40_PMC_170C                                      0x0000170C

/* probably PMC ? */
#define NV50_PUNK_BAR0_PRAMIN                              0x00001700
#define NV50_PUNK_BAR_CFG_BASE                             0x00001704
#define NV50_PUNK_BAR_CFG_BASE_VALID                          (1<<30)
#define NV50_PUNK_BAR1_CTXDMA                              0x00001708
#define NV50_PUNK_BAR1_CTXDMA_VALID                           (1<<31)
#define NV50_PUNK_BAR3_CTXDMA                              0x0000170C