renesas/drm.git - libdrm, cloned from git://anongit.freedesktop.org/mesa/drm

diff options

author	Laurent Pinchart <laurent.pinchart@ideasonboard.com>	2012-07-20 14:50:48 +0200
committer	Rob Clark <rob@ti.com>	2012-07-20 10:30:47 -0500
commit	cc90ffa9b18fc6f925a3a2c36131332b8af558f8 (patch)
tree	8645eefea2b5bc9c9e747e2d8f937cc6b0fc7a8c /intel/tests/gen5-3d.batch
parent	0375222c714e8b7ba55f12d5cb389383be1cf54d (diff)

modetest: Make frame buffer format configurable on the command line

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Diffstat (limited to 'intel/tests/gen5-3d.batch')

0 files changed, 0 insertions, 0 deletions

ef='#n107'>107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854

/*
 * Copyright (C) 2005-2006 Erik Waling
 * Copyright (C) 2006 Stephane Marchesin
 * Copyright (C) 2007-2008 Stuart Bennett
 * Copyright (C) 2008 Maarten Maathuis.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#include <asm/byteorder.h>
#include "nouveau_bios.h"
#include "nouveau_drv.h"

/* returns true if it mismatches */
static bool nv_checksum(const uint8_t *data, unsigned int length)
{
	/* there's a few checksums in the BIOS, so here's a generic checking function */
	int i;
	uint8_t sum = 0;

	for (i = 0; i < length; i++)
		sum += data[i];

	if (sum)
		return true;

	return false;
}

static int nv_valid_bios(struct drm_device *dev, uint8_t *data)
{
	/* check for BIOS signature */
	if (!(data[0] == 0x55 && data[1] == 0xAA)) {
		DRM_ERROR("BIOS signature not found.\n");
		return 0;
	}

	if (nv_checksum(data, data[2] * 512)) {
		DRM_ERROR("BIOS checksum invalid.\n");
		return 1;
	}

	return 2;
}

static void nv_shadow_bios_rom(struct drm_device *dev, uint8_t *data)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	int i;

	/* enable access to rom */
	NV_WRITE(NV04_PBUS_PCI_NV_20, NV04_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED);

	/* This is also valid for pre-NV50, it just happened to be the only define already present. */
	for (i=0; i < NV50_PROM__ESIZE; i++) {
		/* Appearantly needed for a 6600GT/6800LE bug. */
		data[i] = DRM_READ8(dev_priv->mmio, NV50_PROM + i);
		data[i] = DRM_READ8(dev_priv->mmio, NV50_PROM + i);
		data[i] = DRM_READ8(dev_priv->mmio, NV50_PROM + i);
		data[i] = DRM_READ8(dev_priv->mmio, NV50_PROM + i);
		data[i] = DRM_READ8(dev_priv->mmio, NV50_PROM + i);
	}

	/* disable access to rom */
	NV_WRITE(NV04_PBUS_PCI_NV_20, NV04_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);
}

static void nv_shadow_bios_ramin(struct drm_device *dev, uint8_t *data)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	uint32_t old_bar0_pramin = 0;
	int i;

	/* Move the bios copy to the start of ramin? */
	if (dev_priv->card_type >= NV_50) {
		uint32_t vbios_vram = (NV_READ(0x619f04) & ~0xff) << 8;

		if (!vbios_vram)
			vbios_vram = (NV_READ(0x1700) << 16) + 0xf0000;

		old_bar0_pramin = NV_READ(0x1700);
		NV_WRITE(0x1700, vbios_vram >> 16);
	}

	for (i=0; i < NV50_PROM__ESIZE; i++)
		data[i] = DRM_READ8(dev_priv->mmio, NV04_PRAMIN + i);

	if (dev_priv->card_type >= NV_50)
		NV_WRITE(0x1700, old_bar0_pramin);
}

static bool nv_shadow_bios(struct drm_device *dev, uint8_t *data)
{
	nv_shadow_bios_rom(dev, data);
	if (nv_valid_bios(dev, data) == 2)
		return true;

	nv_shadow_bios_ramin(dev, data);
	if (nv_valid_bios(dev, data))
		return true;

	return false;
}

struct bit_entry {
	uint8_t id[2];
	uint16_t length;
	uint16_t offset;
};

static int parse_bit_A_tbl_entry(struct drm_device *dev, struct bios *bios, struct bit_entry *bitentry)
{
	/* Parses the load detect value table.
	 *
	 * Starting at bitentry->offset:
	 *
	 * offset + 0 (16 bits): table pointer
	 */

	uint16_t load_table_pointer;

	if (bitentry->length != 3) {
		DRM_ERROR("Do not understand BIT loadval table\n");
		return 0;
	}

	load_table_pointer = le16_to_cpu(*((uint16_t *)(&bios->data[bitentry->offset])));

	if (load_table_pointer == 0x0) {
		DRM_ERROR("Pointer to loadval table invalid\n");
		return 0;
	}

	/* Some kind of signature */
	if (bios->data[load_table_pointer] != 16 || bios->data[load_table_pointer + 1] != 4 || 
		bios->data[load_table_pointer + 2] != 4 || bios->data[load_table_pointer + 3] != 2)
		return 0;

	bios->dactestval = le32_to_cpu(*((uint32_t *)&bios->data[load_table_pointer + 4])) & 0x3FF;

	return 1;
}

static int parse_bit_C_tbl_entry(struct drm_device *dev, struct bios *bios, struct bit_entry *bitentry)
{
	/* offset + 8  (16 bits): PLL limits table pointer
	 *
	 * There's more in here, but that's unknown.
	 */

	if (bitentry->length < 10) {
		DRM_ERROR("Do not understand BIT C table\n");
		return 0;
	}

	bios->pll_limit_tbl_ptr = le16_to_cpu(*((uint16_t *)(&bios->data[bitentry->offset + 8])));

	return 1;
}

static void parse_bit_structure(struct drm_device *dev, struct bios *bios, const uint16_t bitoffset)
{
	int entries = bios->data[bitoffset + 4];
	/* parse i first, I next (which needs C & M before it), and L before D */
	char parseorder[] = "iCMILDTA";
	struct bit_entry bitentry;
	int i, j, offset;

	for (i = 0; i < sizeof(parseorder); i++) {
		for (j = 0, offset = bitoffset + 6; j < entries; j++, offset += 6) {
			bitentry.id[0] = bios->data[offset];
			bitentry.id[1] = bios->data[offset + 1];
			bitentry.length = le16_to_cpu(*((uint16_t *)&bios->data[offset + 2]));
			bitentry.offset = le16_to_cpu(*((uint16_t *)&bios->data[offset + 4]));

			if (bitentry.id[0] != parseorder[i])
				continue;

			switch (bitentry.id[0]) {
			case 'A':
				parse_bit_A_tbl_entry(dev, bios, &bitentry);
				break;
			case 'C':
				parse_bit_C_tbl_entry(dev, bios, &bitentry);
				break;
			}
		}
	}
}

static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
{
	int i, j;

	for (i = 0; i <= (n - len); i++) {
		for (j = 0; j < len; j++)
			if (data[i + j] != str[j])
				break;
		if (j == len)
			return i;
	}

	return 0;
}

static void
read_dcb_i2c_entry(struct drm_device *dev, uint8_t dcb_version, uint16_t i2ctabptr, int index)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct bios *bios = &dev_priv->bios;
	uint8_t *i2ctable = &bios->data[i2ctabptr];
	uint8_t headerlen = 0;
	int i2c_entries = MAX_NUM_DCB_ENTRIES;
	int recordoffset = 0, rdofs = 1, wrofs = 0;

	if (!i2ctabptr)
		return;

	if (dcb_version >= 0x30) {
		if (i2ctable[0] != dcb_version) /* necessary? */
			DRM_ERROR(
				   "DCB I2C table version mismatch (%02X vs %02X)\n",
				   i2ctable[0], dcb_version);
		headerlen = i2ctable[1];
		i2c_entries = i2ctable[2];

		/* same address offset used for read and write for C51 and G80 */
		if (bios->chip_version == 0x51)
			rdofs = wrofs = 1;
		if (i2ctable[0] >= 0x40)
			rdofs = wrofs = 0;
	}
	/* it's your own fault if you call this function on a DCB 1.1 BIOS --
	 * the test below is for DCB 1.2
	 */
	if (dcb_version < 0x14) {
		recordoffset = 2;
		rdofs = 0;
		wrofs = 1;
	}

	if (index == 0xf)
		return;
	if (index > i2c_entries) {
		DRM_ERROR(
			   "DCB I2C index too big (%d > %d)\n",
			   index, i2ctable[2]);
		return;
	}
	if (i2ctable[headerlen + 4 * index + 3] == 0xff) {
		DRM_ERROR(
			   "DCB I2C entry invalid\n");
		return;
	}

	if (bios->chip_version == 0x51) {
		int port_type = i2ctable[headerlen + 4 * index + 3];

		if (port_type != 4)
			DRM_ERROR(
				   "DCB I2C table has port type %d\n", port_type);
	}
	if (i2ctable[0] >= 0x40) {
		int port_type = i2ctable[headerlen + 4 * index + 3];

		if (port_type != 5)
			DRM_ERROR(
				   "DCB I2C table has port type %d\n", port_type);
	}

	dev_priv->dcb_table.i2c_read[index] = i2ctable[headerlen + recordoffset + rdofs + 4 * index];
	dev_priv->dcb_table.i2c_write[index] = i2ctable[headerlen + recordoffset + wrofs + 4 * index];
}

static bool
parse_dcb_entry(struct drm_device *dev, int index, uint8_t dcb_version, uint16_t i2ctabptr, uint32_t conn, uint32_t conf)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct dcb_entry *entry = &dev_priv->dcb_table.entry[index];

	memset(entry, 0, sizeof (struct dcb_entry));

	entry->index = index;
	/* safe defaults for a crt */
	entry->type = 0;
	entry->i2c_index = 0;
	entry->heads = 1;
	entry->bus = 0;
	entry->location = LOC_ON_CHIP;
	entry->or = 1;
	entry->duallink_possible = false;

	if (dcb_version >= 0x20) {
		entry->type = conn & 0xf;
		entry->i2c_index = (conn >> 4) & 0xf;


context:
space:
mode: