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-rw-r--r--drm.h19336logplain
-rw-r--r--drm_sarea.h2232logplain
-rw-r--r--mga_dma.c20600logplain
-rw-r--r--mga_drm.h9814logplain
-rw-r--r--mga_drv.h18019logplain
-rw-r--r--mga_irq.c3228logplain
-rw-r--r--mga_state.c28438logplain
-rw-r--r--mga_ucode.h173314logplain
-rw-r--r--mga_warp.c6920logplain
-rw-r--r--r128_cce.c25812logplain
-rw-r--r--r128_drm.h9109logplain
-rw-r--r--r128_drv.h16096logplain
-rw-r--r--r128_irq.c3361logplain
-rw-r--r--r128_state.c41921logplain
-rw-r--r--radeon_cp.c47300logplain
-rw-r--r--radeon_drm.h20727logplain
-rw-r--r--radeon_drv.h31613logplain
-rw-r--r--radeon_irq.c7000logplain
-rw-r--r--radeon_mem.c7724logplain
-rw-r--r--radeon_state.c68388logplain
-rw-r--r--sis_drm.h868logplain
-rw-r--r--sis_drv.h1806logplain
-rw-r--r--sis_ds.c8571logplain
-rw-r--r--sis_ds.h5053logplain
-rw-r--r--sis_mm.c9520logplain
-rw-r--r--tdfx_drv.h2107logplain
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-07 16:50:44 +0000
.liu@intel.com> * Copyright 2008 Red Hat <mjg@redhat.com> * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #include <linux/acpi.h> #include "drmP.h" #include "i915_drm.h" #include "i915_drv.h" #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25) #define PCI_ASLE 0xe4 #define PCI_ASLS 0xfc #define OPREGION_SZ (8*1024) #define OPREGION_HEADER_OFFSET 0 #define OPREGION_ACPI_OFFSET 0x100 #define OPREGION_SWSCI_OFFSET 0x200 #define OPREGION_ASLE_OFFSET 0x300 #define OPREGION_VBT_OFFSET 0x1000 #define OPREGION_SIGNATURE "IntelGraphicsMem" #define MBOX_ACPI (1<<0) #define MBOX_SWSCI (1<<1) #define MBOX_ASLE (1<<2) /* _DOD id definitions */ #define OUTPUT_CONNECTOR_MSK 0xf000 #define OUTPUT_CONNECTOR_OFFSET 12 #define OUTPUT_PORT_MSK 0x00f0 #define OUTPUT_PORT_OFFSET 4 #define OUTPUT_PORT_ANALOG 0 #define OUTPUT_PORT_LVDS 1 #define OUTPUT_PORT_SDVOB 2 #define OUTPUT_PORT_SDVOC 3 #define OUTPUT_PORT_TV 4 #define OUTPUT_DISPLAY_MSK 0x0f00 #define OUTPUT_DISPLAY_OFFSET 8 #define OUTPUT_DISPLAY_OTHER 0 #define OUTPUT_DISPLAY_VGA 1 #define OUTPUT_DISPLAY_TV 2 #define OUTPUT_DISPLAY_DIGI 3 #define OUTPUT_DISPLAY_FLAT_PANEL 4 /* predefined id for integrated LVDS and VGA connector */ #define OUTPUT_INT_LVDS 0x00000110 #define OUTPUT_INT_VGA 0x80000100 struct opregion_header { u8 signature[16]; u32 size; u32 opregion_ver; u8 bios_ver[32]; u8 vbios_ver[16]; u8 driver_ver[16]; u32 mboxes; u8 reserved[164]; } __attribute__((packed)); /* OpRegion mailbox #1: public ACPI methods */ struct opregion_acpi { u32 drdy; /* driver readiness */ u32 csts; /* notification status */ u32 cevt; /* current event */ u8 rsvd1[20]; u32 didl[8]; /* supported display devices ID list */ u32 cpdl[8]; /* currently presented display list */ u32 cadl[8]; /* currently active display list */ u32 nadl[8]; /* next active devices list */ u32 aslp; /* ASL sleep time-out */ u32 tidx; /* toggle table index */ u32 chpd; /* current hotplug enable indicator */ u32 clid; /* current lid state*/ u32 cdck; /* current docking state */ u32 sxsw; /* Sx state resume */ u32 evts; /* ASL supported events */ u32 cnot; /* current OS notification */ u32 nrdy; /* driver status */ u8 rsvd2[60]; } __attribute__((packed)); /* OpRegion mailbox #2: SWSCI */ struct opregion_swsci { u32 scic; /* SWSCI command|status|data */ u32 parm; /* command parameters */ u32 dslp; /* driver sleep time-out */ u8 rsvd[244]; } __attribute__((packed)); /* OpRegion mailbox #3: ASLE */ struct opregion_asle { u32 ardy; /* driver readiness */ u32 aslc; /* ASLE interrupt command */ u32 tche; /* technology enabled indicator */ u32 alsi; /* current ALS illuminance reading */ u32 bclp; /* backlight brightness to set */ u32 pfit; /* panel fitting state */ u32 cblv; /* current brightness level */ u16 bclm[20]; /* backlight level duty cycle mapping table */ u32 cpfm; /* current panel fitting mode */ u32 epfm; /* enabled panel fitting modes */ u8 plut[74]; /* panel LUT and identifier */ u32 pfmb; /* PWM freq and min brightness */ u8 rsvd[102]; } __attribute__((packed)); /* ASLE irq request bits */ #define ASLE_SET_ALS_ILLUM (1 << 0) #define ASLE_SET_BACKLIGHT (1 << 1) #define ASLE_SET_PFIT (1 << 2) #define ASLE_SET_PWM_FREQ (1 << 3) #define ASLE_REQ_MSK 0xf /* response bits of ASLE irq request */ #define ASLE_ALS_ILLUM_FAIL (2<<10) #define ASLE_BACKLIGHT_FAIL (2<<12) #define ASLE_PFIT_FAIL (2<<14) #define ASLE_PWM_FREQ_FAIL (2<<16) /* ASLE backlight brightness to set */ #define ASLE_BCLP_VALID (1<<31) #define ASLE_BCLP_MSK (~(1<<31)) /* ASLE panel fitting request */ #define ASLE_PFIT_VALID (1<<31) #define ASLE_PFIT_CENTER (1<<0) #define ASLE_PFIT_STRETCH_TEXT (1<<1) #define ASLE_PFIT_STRETCH_GFX (1<<2) /* PWM frequency and minimum brightness */ #define ASLE_PFMB_BRIGHTNESS_MASK (0xff) #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8) #define ASLE_PFMB_PWM_MASK (0x7ffffe00) #define ASLE_PFMB_PWM_VALID (1<<31) #define ASLE_CBLV_VALID (1<<31) static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) { struct drm_i915_private *dev_priv = dev->dev_private; struct opregion_asle *asle = dev_priv->opregion.asle; u32 blc_pwm_ctl; if (!(bclp & ASLE_BCLP_VALID)) return ASLE_BACKLIGHT_FAIL; bclp &= ASLE_BCLP_MSK; if (bclp < 0 || bclp > 255) return ASLE_BACKLIGHT_FAIL; blc_pwm_ctl = I915_READ(BLC_PWM_CTL); blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK; I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl | ((bclp * 0x101) -1)); asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID; return 0; } static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi) { return 0; } static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb) { struct drm_i915_private *dev_priv = dev->dev_private; if (pfmb & ASLE_PFMB_PWM_VALID) { u32 blc_pwm_ctl = I915_READ(BLC_PWM_CTL); u32 pwm = pfmb & ASLE_PFMB_PWM_MASK; blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK; pwm = pwm >> 9; // FIXME - what do we do with the PWM? } return 0; } static u32 asle_set_pfit(struct drm_device *dev, u32 pfit) { if (!(pfit & ASLE_PFIT_VALID)) return ASLE_PFIT_FAIL; return 0; } void opregion_asle_intr(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; struct opregion_asle *asle = dev_priv->opregion.asle; u32 asle_stat = 0; u32 asle_req; if (!asle) return; asle_req = asle->aslc & ASLE_REQ_MSK; if (!asle_req) { DRM_DEBUG("non asle set request??\n"); return; } if (asle_req & ASLE_SET_ALS_ILLUM) asle_stat |= asle_set_als_illum(dev, asle->alsi); if (asle_req & ASLE_SET_BACKLIGHT) asle_stat |= asle_set_backlight(dev, asle->bclp); if (asle_req & ASLE_SET_PFIT) asle_stat |= asle_set_pfit(dev, asle->pfit); if (asle_req & ASLE_SET_PWM_FREQ) asle_stat |= asle_set_pwm_freq(dev, asle->pfmb); asle->aslc = asle_stat; }