/* * \file xf86drmMode.h * Header for DRM modesetting interface. * * \author Jakob Bornecrantz * * \par Acknowledgements: * Feb 2007, Dave Airlie */ /* * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas. * Copyright (c) 2007-2008 Dave Airlie * Copyright (c) 2007-2008 Jakob Bornecrantz * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #include /* * This is the interface for modesetting for drm. * * In order to use this interface you must include either or another * header defining uint32_t, int32_t and uint16_t. * * It aims to provide a randr1.2 compatible interface for modesettings in the * kernel, the interface is also ment to be used by libraries like EGL. * * More information can be found in randrproto.txt which can be found here: * http://gitweb.freedesktop.org/?p=xorg/proto/randrproto.git * * There are some major diffrences to be noted. Unlike the randr1.2 proto you * need to create the memory object of the framebuffer yourself with the ttm * buffer object interface. This object needs to be pinned. */ /* * If we pickup an old version of drm.h which doesn't include drm_mode.h * we should redefine defines. This is so that builds doesn't breaks with * new libdrm on old kernels. */ #ifndef _DRM_MODE_H #define DRM_DISPLAY_INFO_LEN 32 #define DRM_CONNECTOR_NAME_LEN 32 #define DRM_DISPLAY_MODE_LEN 32 #define DRM_PROP_NAME_LEN 32 #define DRM_MODE_TYPE_BUILTIN (1<<0) #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) #define DRM_MODE_TYPE_PREFERRED (1<<3) #define DRM_MODE_TYPE_DEFAULT (1<<4) #define DRM_MODE_TYPE_USERDEF (1<<5) #define DRM_MODE_TYPE_DRIVER (1<<6) /* Video mode flags */ /* bit compatible with the xorg definitions. */ #define DRM_MODE_FLAG_PHSYNC (1<<0) #define DRM_MODE_FLAG_NHSYNC (1<<1) #define DRM_MODE_FLAG_PVSYNC (1<<2) #define DRM_MODE_FLAG_NVSYNC (1<<3) #define DRM_MODE_FLAG_INTERLACE (1<<4) #define DRM_MODE_FLAG_DBLSCAN (1<<5) #define DRM_MODE_FLAG_CSYNC (1<<6) #define DRM_MODE_FLAG_PCSYNC (1<<7) #define DRM_MODE_FLAG_NCSYNC (1<<8) #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */ #define DRM_MODE_FLAG_BCAST (1<<10) #define DRM_MODE_FLAG_PIXMUX (1<<11) #define DRM_MODE_FLAG_DBLCLK (1<<12) #define DRM_MODE_FLAG_CLKDIV2 (1<<13) /* DPMS flags */ /* bit compatible with the xorg definitions. */ #define DRM_MODE_DPMS_ON 0 #define DRM_MODE_DPMS_STANDBY 1 #define DRM_MODE_DPMS_SUSPEND 2 #define DRM_MODE_DPMS_OFF 3 /* Scaling mode options */ #define DRM_MODE_SCALE_NON_GPU 0 #define DRM_MODE_SCALE_FULLSCREEN 1 #define DRM_MODE_SCALE_NO_SCALE 2 #define DRM_MODE_SCALE_ASPECT 3 /* Dithering mode options */ #define DRM_MODE_DITHERING_OFF 0 #define DRM_MODE_DITHERING_ON 1 #define DRM_MODE_ENCODER_NONE 0 #define DRM_MODE_ENCODER_DAC 1 #define DRM_MODE_ENCODER_TMDS 2 #define DRM_MODE_ENCODER_LVDS 3 #define DRM_MODE_ENCODER_TVDAC 4 #define DRM_MODE_SUBCONNECTOR_Automatic 0 #define DRM_MODE_SUBCONNECTOR_Unknown 0 #define DRM_MODE_SUBCONNECTOR_DVID 3 #define DRM_MODE_SUBCONNECTOR_DVIA 4 #define DRM_MODE_SUBCONNECTOR_Composite 5 #define DRM_MODE_SUBCONNECTOR_SVIDEO 6 #define DRM_MODE_SUBCONNECTOR_Component 8 #define DRM_MODE_CONNECTOR_Unknown 0 #define DRM_MODE_CONNECTOR_VGA 1 #define DRM_MODE_CONNECTOR_DVII 2 #define DRM_MODE_CONNECTOR_DVID 3 #define DRM_MODE_CONNECTOR_DVIA 4 #define DRM_MODE_CONNECTOR_Composite 5 #define DRM_MODE_CONNECTOR_SVIDEO 6 #define DRM_MODE_CONNECTOR_LVDS 7 #define DRM_MODE_CONNECTOR_Component 8 #define DRM_MODE_CONNECTOR_9PinDIN 9 #define DRM_MODE_CONNECTOR_DisplayPort 10 #define DRM_MODE_CONNECTOR_HDMIA 11 #define DRM_MODE_CONNECTOR_HDMIB 12 #define DRM_MODE_CONNECTOR_TV 13 #define DRM_MODE_CONNECTOR_eDP 14 #define DRM_MODE_PROP_PENDING (1<<0) #define DRM_MODE_PROP_RANGE (1<<1) #define DRM_MODE_PROP_IMMUTABLE (1<<2) #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */ #define DRM_MODE_PROP_BLOB (1<<4) #define DRM_MODE_CURSOR_BO (1<<0) #define DRM_MODE_CURSOR_MOVE (1<<1) #endif /* _DRM_MODE_H */ /* * Feature defines * * Just because these are defined doesn't mean that the kernel * can do that feature, its just for new code vs old libdrm. */ #define DRM_MODE_FEATURE_KMS 1 #define DRM_MODE_FEATURE_DIRTYFB 1 typedef struct _drmModeRes { int count_fbs; uint32_t *fbs; int count_crtcs; uint32_t *crtcs; int count_connectors; uint32_t *connectors; int count_encoders; uint32_t *encoders; uint32_t min_width, max_width; uint32_t min_height, max_height; } drmModeRes, *drmModeResPtr; typedef struct _drmModeModeInfo { uint32_t clock; uint16_t hdisplay, hsync_start, hsync_end, htotal, hskew; uint16_t vdisplay, vsync_start, vsync_end, vtotal, vscan; uint32_t vrefresh; uint32_t flags; uint32_t type; char name[DRM_DISPLAY_MODE_LEN]; } drmModeModeInfo, *drmModeModeInfoPtr; typedef struct _drmModeFB { uint32_t fb_id; uint32_t width, height; uint32_t pitch; uint32_t bpp; uint32_t depth; /* driver specific handle */ uint32_t handle; } drmModeFB, *drmModeFBPtr; typedef struct drm_clip_rect drmModeClip, *drmModeClipPtr; typedef struct _drmModePropertyBlob { uint32_t id; uint32_t length; void *data; } drmModePropertyBlobRes, *drmModePropertyBlobPtr; typedef struct _drmModeProperty { uint32_t prop_id; uint32_t flags; char name[DRM_PROP_NAME_LEN]; int count_values; uint64_t *values; // store the blob lengths int count_enums; struct drm_mode_property_enum *enums; int count_blobs; uint32_t *blob_ids; // store the blob IDs } drmModePropertyRes, *drmModePropertyPtr; typedef struct _drmModeCrtc { uint32_t crtc_id; uint32_t buffer_id; /**< FB id to connect to 0 = disconnect */ uint32_t x, y; /**< Position on the framebuffer */ uint32_t width, height; int mode_valid; drmModeModeInfo mode; int gamma_size; /**< Number of gamma stops */ } drmModeCrtc, *drmModeCrtcPtr; typedef struct _drmModeEncoder { uint32_t encoder_id; uint32_t encoder_type; uint32_t crtc_id; uint32_t possible_crtcs; uint32_t possible_clones; } drmModeEncoder, *drmModeEncoderPtr; typedef enum { DRM_MODE_CONNECTED = 1, DRM_MODE_DISCONNECTED = 2, DRM_MODE_UNKNOWNCONNECTION = 3 } drmModeConnection; typedef enum { DRM_MODE_SUBPIXEL_UNKNOWN = 1, DRM_MODE_SUBPIXEL_HORIZONTAL_RGB = 2, DRM_MODE_SUBPIXEL_HORIZONTAL_BGR = 3, DRM_MODE_SUBPIXEL_VERTICAL_RGB = 4, DRM_MODE_SUBPIXEL_VERTICAL_BGR = 5, DRM_MODE_SUBPIXEL_NONE = 6 } drmModeSubPixel; typedef struct _drmModeConnector { uint32_t connector_id; uint32_t encoder_id; /**< Encoder currently connected to */ uint32_t connector_type; uint32_t connector_type_id; drmModeConnection connection; uint32_t mmWidth, mmHeight; /**< HxW in millimeters */ drmModeSubPixel subpixel; int count_modes; drmModeModeInfoPtr modes; int count_props; uint32_t *props; /**< List of property ids */ uint64_t *prop_values; /**< List of property values */ int count_encoders; uint32_t *encoders; /**< List of encoder ids */ } drmModeConnector, *drmModeConnectorPtr; extern void drmModeFreeModeInfo( drmModeModeInfoPtr ptr ); extern void drmModeFreeResources( drmModeResPtr ptr ); extern void drmModeFreeFB( drmModeFBPtr ptr ); extern void drmModeFreeCrtc( drmModeCrtcPtr ptr ); extern void drmModeFreeConnector( drmModeConnectorPtr ptr ); extern void drmModeFreeEncoder( drmModeEncoderPtr ptr ); /** * Retrives all of the resources associated with a card. */ extern drmModeResPtr drmModeGetResources(int fd); /* * FrameBuffer manipulation. */ /** * Retrive information about framebuffer bufferId */ extern drmModeFBPtr drmModeGetFB(int fd, uint32_t bufferId); /** * Creates a new framebuffer with an buffer object as its scanout buffer. */ extern int drmModeAddFB(int fd, uint32_t width, uint32_t height, uint8_t depth, uint8_t bpp, uint32_t pitch, uint32_t bo_handle, uint32_t *buf_id); /** * Destroies the given framebuffer. */ extern int drmModeRmFB(int fd, uint32_t bufferId); /** * Mark a region of a framebuffer as dirty. */ extern int drmModeDirtyFB(int fd, uint32_t bufferId, drmModeClipPtr clips, uint32_t num_clips); /* * Crtc functions */ /** * Retrive information about the ctrt crtcId */ extern drmModeCrtcPtr drmModeGetCrtc(int fd, uint32_t crtcId); /** * Set the mode on a crtc crtcId with the given mode modeId. */ int drmModeSetCrtc(int fd, uint32_t crtcId, uint32_t bufferId, uint32_t x, uint32_t y, uint32_t *connectors, int count, drmModeModeInfoPtr mode); /* * Cursor functions */ /** * Set the cursor on crtc */ int drmModeSetCursor(int fd, uint32_t crtcId, uint32_t bo_handle, uint32_t width, uint32_t height); /** * Move the cursor on crtc */ int drmModeMoveCursor(int fd, uint32_t crtcId, int x, int y); /** * Encoder functions */ drmModeEncoderPtr drmModeGetEncoder(int fd, uint32_t encoder_id); /* * Connector manipulation */ /** * Retrive information about the connector connectorId. */ extern drmModeConnectorPtr drmModeGetConnector(int fd, uint32_t connectorId); /** * Attaches the given mode to an connector. */ extern int drmModeAttachMode(int fd, uint32_t connectorId, drmModeModeInfoPtr mode_info); /** * Detaches a mode from the connector * must be unused, by the given mode. */ extern int drmModeDetachMode(int fd, uint32_t connectorId, drmModeModeInfoPtr mode_info); extern drmModePropertyPtr drmModeGetProperty(int fd, uint32_t propertyId); extern void drmModeFreeProperty(drmModePropertyPtr ptr); extern drmModePropertyBlobPtr drmModeGetPropertyBlob(int fd, uint32_t blob_id); extern void drmModeFreePropertyBlob(drmModePropertyBlobPtr ptr); extern int drmModeConnectorSetProperty(int fd, uint32_t connector_id, uint32_t property_id, uint64_t value); extern int drmCheckModesettingSupported(const char *busid); extern int drmModeCrtcSetGamma(int fd, uint32_t crtc_id, uint32_t size, uint16_t *red, uint16_t *green, uint16_t *blue); extern int drmModeCrtcGetGamma(int fd, uint32_t crtc_id, uint32_t size, uint16_t *red, uint16_t *green, uint16_t *blue); extern int drmModePageFlip(int fd, uint32_t crtc_id, uint32_t fb_id, uint32_t flags, void *user_data); ' href='#n269'>269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 
#ifndef _I830_DRM_H_
#define _I830_DRM_H_

/* WARNING: These defines must be the same as what the Xserver uses.
 * if you change them, you must change the defines in the Xserver.
 *
 * KW: Actually, you can't ever change them because doing so would
 * break backwards compatibility.
 */

#ifndef _I830_DEFINES_
#define _I830_DEFINES_

#define I830_DMA_BUF_ORDER		12
#define I830_DMA_BUF_SZ 		(1<<I830_DMA_BUF_ORDER)
#define I830_DMA_BUF_NR 		256
#define I830_NR_SAREA_CLIPRECTS 	8

/* Each region is a minimum of 64k, and there are at most 64 of them.
 */
#define I830_NR_TEX_REGIONS 64
#define I830_LOG_MIN_TEX_REGION_SIZE 16

/* KW: These aren't correct but someone set them to two and then
 * released the module.  Now we can't change them as doing so would
 * break backwards compatibility.
 */
#define I830_TEXTURE_COUNT	2
#define I830_TEXBLEND_COUNT	I830_TEXTURE_COUNT

#define I830_TEXBLEND_SIZE	12	/* (4 args + op) * 2 + COLOR_FACTOR */

#define I830_UPLOAD_CTX			0x1
#define I830_UPLOAD_BUFFERS		0x2
#define I830_UPLOAD_CLIPRECTS		0x4
#define I830_UPLOAD_TEX0_IMAGE		0x100 /* handled clientside */
#define I830_UPLOAD_TEX0_CUBE		0x200 /* handled clientside */
#define I830_UPLOAD_TEX1_IMAGE		0x400 /* handled clientside */
#define I830_UPLOAD_TEX1_CUBE		0x800 /* handled clientside */
#define I830_UPLOAD_TEX2_IMAGE		0x1000 /* handled clientside */
#define I830_UPLOAD_TEX2_CUBE		0x2000 /* handled clientside */
#define I830_UPLOAD_TEX3_IMAGE		0x4000 /* handled clientside */
#define I830_UPLOAD_TEX3_CUBE		0x8000 /* handled clientside */
#define I830_UPLOAD_TEX_N_IMAGE(n)	(0x100 << (n * 2))
#define I830_UPLOAD_TEX_N_CUBE(n)	(0x200 << (n * 2))
#define I830_UPLOAD_TEXIMAGE_MASK	0xff00
#define I830_UPLOAD_TEX0			0x10000
#define I830_UPLOAD_TEX1			0x20000
#define I830_UPLOAD_TEX2			0x40000
#define I830_UPLOAD_TEX3			0x80000
#define I830_UPLOAD_TEX_N(n)		(0x10000 << (n))
#define I830_UPLOAD_TEX_MASK		0xf0000
#define I830_UPLOAD_TEXBLEND0		0x100000
#define I830_UPLOAD_TEXBLEND1		0x200000
#define I830_UPLOAD_TEXBLEND2		0x400000
#define I830_UPLOAD_TEXBLEND3		0x800000
#define I830_UPLOAD_TEXBLEND_N(n)	(0x100000 << (n))
#define I830_UPLOAD_TEXBLEND_MASK	0xf00000
#define I830_UPLOAD_TEX_PALETTE_N(n)    (0x1000000 << (n))
#define I830_UPLOAD_TEX_PALETTE_SHARED	0x4000000
#define I830_UPLOAD_STIPPLE         	0x8000000

/* Indices into buf.Setup where various bits of state are mirrored per
 * context and per buffer.  These can be fired at the card as a unit,
 * or in a piecewise fashion as required.
 */

/* Destbuffer state 
 *    - backbuffer linear offset and pitch -- invarient in the current dri
 *    - zbuffer linear offset and pitch -- also invarient
 *    - drawing origin in back and depth buffers.
 *
 * Keep the depth/back buffer state here to accommodate private buffers
 * in the future.
 */

#define I830_DESTREG_CBUFADDR 0
#define I830_DESTREG_DBUFADDR 1
#define I830_DESTREG_DV0 2
#define I830_DESTREG_DV1 3
#define I830_DESTREG_SENABLE 4
#define I830_DESTREG_SR0 5
#define I830_DESTREG_SR1 6
#define I830_DESTREG_SR2 7
#define I830_DESTREG_DR0 8
#define I830_DESTREG_DR1 9
#define I830_DESTREG_DR2 10
#define I830_DESTREG_DR3 11
#define I830_DESTREG_DR4 12
#define I830_DEST_SETUP_SIZE 13

/* Context state
 */
#define I830_CTXREG_STATE1		0
#define I830_CTXREG_STATE2		1
#define I830_CTXREG_STATE3		2
#define I830_CTXREG_STATE4		3
#define I830_CTXREG_STATE5		4
#define I830_CTXREG_IALPHAB		5
#define I830_CTXREG_STENCILTST		6
#define I830_CTXREG_ENABLES_1		7
#define I830_CTXREG_ENABLES_2		8
#define I830_CTXREG_AA			9
#define I830_CTXREG_FOGCOLOR		10
#define I830_CTXREG_BLENDCOLR0		11
#define I830_CTXREG_BLENDCOLR		12 /* Dword 1 of 2 dword command */
#define I830_CTXREG_VF			13
#define I830_CTXREG_VF2			14
#define I830_CTXREG_MCSB0		15
#define I830_CTXREG_MCSB1		16
#define I830_CTX_SETUP_SIZE		17

/* 1.3: Stipple state
 */ 
#define I830_STPREG_ST0 0
#define I830_STPREG_ST1 1
#define I830_STP_SETUP_SIZE 2


/* Texture state (per tex unit)
 */

#define I830_TEXREG_MI0	0	/* GFX_OP_MAP_INFO (6 dwords) */
#define I830_TEXREG_MI1	1
#define I830_TEXREG_MI2	2
#define I830_TEXREG_MI3	3
#define I830_TEXREG_MI4	4
#define I830_TEXREG_MI5	5
#define I830_TEXREG_MF	6	/* GFX_OP_MAP_FILTER */
#define I830_TEXREG_MLC	7	/* GFX_OP_MAP_LOD_CTL */
#define I830_TEXREG_MLL	8	/* GFX_OP_MAP_LOD_LIMITS */
#define I830_TEXREG_MCS	9	/* GFX_OP_MAP_COORD_SETS */
#define I830_TEX_SETUP_SIZE 10

#define I830_TEXREG_TM0LI      0 /* load immediate 2 texture map n */
#define I830_TEXREG_TM0S0      1
#define I830_TEXREG_TM0S1      2
#define I830_TEXREG_TM0S2      3
#define I830_TEXREG_TM0S3      4
#define I830_TEXREG_TM0S4      5
#define I830_TEXREG_NOP0       6       /* noop */
#define I830_TEXREG_NOP1       7       /* noop */
#define I830_TEXREG_NOP2       8       /* noop */
#define __I830_TEXREG_MCS      9       /* GFX_OP_MAP_COORD_SETS -- shared */
#define __I830_TEX_SETUP_SIZE   10

#define I830_FRONT   0x1
#define I830_BACK    0x2
#define I830_DEPTH   0x4

#endif /* _I830_DEFINES_ */

typedef struct _drm_i830_init {
	enum {
		I830_INIT_DMA = 0x01,
		I830_CLEANUP_DMA = 0x02
	} func;
	unsigned int mmio_offset;
	unsigned int buffers_offset;
	int sarea_priv_offset;
	unsigned int ring_start;
	unsigned int ring_end;
	unsigned int ring_size;
	unsigned int front_offset;
	unsigned int back_offset;
	unsigned int depth_offset;
	unsigned int w;
	unsigned int h;
	unsigned int pitch;
	unsigned int pitch_bits;
	unsigned int back_pitch;
	unsigned int depth_pitch;
	unsigned int cpp;
} drm_i830_init_t;

/* Warning: If you change the SAREA structure you must change the Xserver
 * structure as well */

typedef struct _drm_i830_tex_region {
	unsigned char next, prev; /* indices to form a circular LRU  */
	unsigned char in_use;	/* owned by a client, or free? */
	int age;		/* tracked by clients to update local LRU's */
} drm_i830_tex_region_t;

typedef struct _drm_i830_sarea {
	unsigned int ContextState[I830_CTX_SETUP_SIZE];
   	unsigned int BufferState[I830_DEST_SETUP_SIZE];
	unsigned int TexState[I830_TEXTURE_COUNT][I830_TEX_SETUP_SIZE];
	unsigned int TexBlendState[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE];
	unsigned int TexBlendStateWordsUsed[I830_TEXBLEND_COUNT];
	unsigned int Palette[2][256];
   	unsigned int dirty;

	unsigned int nbox;
	drm_clip_rect_t boxes[I830_NR_SAREA_CLIPRECTS];

	/* Maintain an LRU of contiguous regions of texture space.  If
	 * you think you own a region of texture memory, and it has an
	 * age different to the one you set, then you are mistaken and
	 * it has been stolen by another client.  If global texAge
	 * hasn't changed, there is no need to walk the list.
	 *
	 * These regions can be used as a proxy for the fine-grained
	 * texture information of other clients - by maintaining them
	 * in the same lru which is used to age their own textures,
	 * clients have an approximate lru for the whole of global
	 * texture space, and can make informed decisions as to which
	 * areas to kick out.  There is no need to choose whether to
	 * kick out your own texture or someone else's - simply eject
	 * them all in LRU order.  
	 */

	drm_i830_tex_region_t texList[I830_NR_TEX_REGIONS+1]; 
				/* Last elt is sentinal */
        int texAge;		/* last time texture was uploaded */
        int last_enqueue;	/* last time a buffer was enqueued */
	int last_dispatch;	/* age of the most recently dispatched buffer */
	int last_quiescent;     /*  */
	int ctxOwner;		/* last context to upload state */

	int vertex_prim;

        int pf_enabled;               /* is pageflipping allowed? */
        int pf_active;               
        int pf_current_page;	    /* which buffer is being displayed? */

        int perf_boxes;             /* performance boxes to be displayed */
   
        /* Here's the state for texunits 2,3:
	 */
	unsigned int TexState2[I830_TEX_SETUP_SIZE];
	unsigned int TexBlendState2[I830_TEXBLEND_SIZE];
	unsigned int TexBlendStateWordsUsed2;

	unsigned int TexState3[I830_TEX_SETUP_SIZE];
	unsigned int TexBlendState3[I830_TEXBLEND_SIZE];
	unsigned int TexBlendStateWordsUsed3;

	unsigned int StippleState[I830_STP_SETUP_SIZE];
} drm_i830_sarea_t;

/* Flags for perf_boxes
 */
#define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
#define I830_BOX_FLIP          0x2 /* populated by kernel */
#define I830_BOX_WAIT          0x4 /* populated by kernel & client */
#define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
#define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */


/* I830 specific ioctls
 * The device specific ioctl range is 0x40 to 0x79.
 */
#define DRM_IOCTL_I830_INIT		DRM_IOW( 0x40, drm_i830_init_t)
#define DRM_IOCTL_I830_VERTEX		DRM_IOW( 0x41, drm_i830_vertex_t)
#define DRM_IOCTL_I830_CLEAR		DRM_IOW( 0x42, drm_i830_clear_t)
#define DRM_IOCTL_I830_FLUSH		DRM_IO ( 0x43)
#define DRM_IOCTL_I830_GETAGE		DRM_IO ( 0x44)
#define DRM_IOCTL_I830_GETBUF		DRM_IOWR(0x45, drm_i830_dma_t)
#define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
#define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
#define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
#define DRM_IOCTL_I830_FLIP		DRM_IO ( 0x49)
#define DRM_IOCTL_I830_IRQ_EMIT         DRM_IOWR(0x4a, drm_i830_irq_emit_t)
#define DRM_IOCTL_I830_IRQ_WAIT         DRM_IOW( 0x4b, drm_i830_irq_wait_t)
#define DRM_IOCTL_I830_GETPARAM         DRM_IOWR(0x4c, drm_i830_getparam_t)
#define DRM_IOCTL_I830_SETPARAM         DRM_IOWR(0x4d, drm_i830_setparam_t)

typedef struct _drm_i830_clear {
	int clear_color;
	int clear_depth;
	int flags;
	unsigned int clear_colormask;
	unsigned int clear_depthmask;
} drm_i830_clear_t;



/* These may be placeholders if we have more cliprects than
 * I830_NR_SAREA_CLIPRECTS.  In that case, the client sets discard to
 * false, indicating that the buffer will be dispatched again with a
 * new set of cliprects.
 */
typedef struct _drm_i830_vertex {
   	int idx;		/* buffer index */
	int used;		/* nr bytes in use */
	int discard;		/* client is finished with the buffer? */
} drm_i830_vertex_t;

typedef struct _drm_i830_copy_t {
   	int idx;		/* buffer index */
	int used;		/* nr bytes in use */
	void __user *address;		/* Address to copy from */
} drm_i830_copy_t;

typedef struct drm_i830_dma {
	void __user *virtual;
	int request_idx;
	int request_size;
	int granted;
} drm_i830_dma_t;


/* 1.3: Userspace can request & wait on irq's:
 */
typedef struct drm_i830_irq_emit {
	int __user *irq_seq;
} drm_i830_irq_emit_t;

typedef struct drm_i830_irq_wait {
	int irq_seq;
} drm_i830_irq_wait_t;


/* 1.3: New ioctl to query kernel params:
 */
#define I830_PARAM_IRQ_ACTIVE            1

typedef struct drm_i830_getparam {
	int param;
	int __user *value;
} drm_i830_getparam_t;


/* 1.3: New ioctl to set kernel params:
 */
#define I830_SETPARAM_USE_MI_BATCHBUFFER_START            1

typedef struct drm_i830_setparam {
	int param;
	int value;
} drm_i830_setparam_t;


#endif /* _I830_DRM_H_ */
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-01 03:06:36 +0000