linux-core/nv50_graph.c


1

../shared-core/nv50_graph.c
/* mga_drv.h -- Private header for the Matrox g200/g400 driver
 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
 *
 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 * 
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 * 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
 * 	    Jeff Hartmann <jhartmann@valinux.com>
 *
 */

#ifndef _MGA_DRV_H_
#define _MGA_DRV_H_

#define MGA_BUF_IN_USE         0
#define MGA_BUF_SWAP_PENDING   1
#define MGA_BUF_FORCE_FIRE     2
#define MGA_BUF_NEEDS_OVERFLOW 3

typedef struct {
	u_int32_t buffer_status;
   	unsigned int num_dwords;
   	unsigned int max_dwords;
   	u_int32_t *current_dma_ptr;
   	u_int32_t *head;
   	u_int32_t phys_head;
	unsigned int prim_age;
   	int sec_used;
   	int idx;
} drm_mga_prim_buf_t;

typedef struct _drm_mga_freelist {
   	unsigned int age;
   	drm_buf_t *buf;
   	struct _drm_mga_freelist *next;
   	struct _drm_mga_freelist *prev;
} drm_mga_freelist_t;

#define MGA_IN_DISPATCH   0
#define MGA_IN_FLUSH      1
#define MGA_IN_WAIT       2
#define MGA_IN_GETBUF	  3

typedef struct _drm_mga_private {
   	u_int32_t dispatch_status;
	unsigned int next_prim_age;
	__volatile__ unsigned int last_prim_age;
   	int reserved_map_idx;
   	int buffer_map_idx;
   	drm_mga_sarea_t *sarea_priv;
   	int primary_size;
   	int warp_ucode_size;
   	int chipset;
   	unsigned int frontOffset;
   	unsigned int backOffset;
   	unsigned int depthOffset;
   	unsigned int textureOffset;
   	unsigned int textureSize;
   	int cpp;
   	unsigned int stride;
   	int sgram;
	int use_agp;
   	drm_mga_warp_index_t WarpIndex[MGA_MAX_G400_PIPES];
	unsigned int WarpPipe;
   	atomic_t pending_bufs;
   	void *status_page;
   	unsigned long real_status_page;
   	u_int8_t *ioremap;
   	drm_mga_prim_buf_t **prim_bufs;
   	drm_mga_prim_buf_t *next_prim;
   	drm_mga_prim_buf_t *last_prim;
   	drm_mga_prim_buf_t *current_prim;
   	int current_prim_idx;
   	drm_mga_freelist_t *head;
   	drm_mga_freelist_t *tail;
	int flush_queue;		/* Processes waiting until flush    */
      	int wait_queue;			/* Processes waiting until interrupt */
	int buf_queue;			/* Processes waiting for a free buf */
	/* Some validated register values:
	 */	
	u_int32_t mAccess;
} drm_mga_private_t;

				/* mga_drv.c */
extern int  mga_init(device_t);
extern void mga_cleanup(device_t);
extern d_ioctl_t mga_version;
extern d_open_t mga_open;
extern d_close_t mga_close;
extern d_ioctl_t mga_ioctl;
extern d_ioctl_t mga_unlock;

				/* mga_dma.c */
extern int  mga_dma_schedule(drm_device_t *dev, int locked);
extern int  mga_irq_install(drm_device_t *dev, int irq);
extern int  mga_irq_uninstall(drm_device_t *dev);
extern d_ioctl_t mga_dma;
extern d_ioctl_t mga_control;
extern d_ioctl_t mga_lock;

/* mga_dma_init does init and release */
extern int mga_dma_cleanup(drm_device_t *dev);
extern d_ioctl_t mga_dma_init;
extern d_ioctl_t mga_flush_ioctl;
extern void mga_flush_write_combine(void);
extern unsigned int mga_create_sync_tag(drm_device_t *dev);
extern drm_buf_t *mga_freelist_get(drm_device_t *dev);
extern int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf);
extern int mga_advance_primary(drm_device_t *dev);
extern void mga_reclaim_buffers(drm_device_t *dev, pid_t pid);

				/* mga_bufs.c */
extern d_ioctl_t mga_addbufs;
extern d_ioctl_t mga_infobufs;
extern d_ioctl_t mga_markbufs;
extern d_ioctl_t mga_freebufs;
extern d_ioctl_t mga_mapbufs;
extern d_ioctl_t mga_addmap;
				/* mga_state.c */
extern d_ioctl_t mga_clear_bufs;
extern d_ioctl_t mga_swap_bufs;
extern d_ioctl_t mga_iload;
extern d_ioctl_t mga_vertex;
extern d_ioctl_t mga_indices;
				/* mga_context.c */
extern d_ioctl_t mga_resctx;
extern d_ioctl_t mga_addctx;
extern d_ioctl_t mga_modctx;
extern d_ioctl_t mga_getctx;
extern d_ioctl_t mga_switchctx;
extern d_ioctl_t mga_newctx;
extern d_ioctl_t mga_rmctx;

extern int  mga_context_switch(drm_device_t *dev, int old, int new);
extern int  mga_context_switch_complete(drm_device_t *dev, int new);


typedef enum {
	TT_GENERAL,
	TT_BLIT,
	TT_VECTOR,
	TT_VERTEX
} transferType_t;

typedef struct {
   	drm_mga_freelist_t *my_freelist;
	int discard;
	int dispatched;
} drm_mga_buf_priv_t;

#define DWGREG0 	0x1c00
#define DWGREG0_END 	0x1dff
#define DWGREG1		0x2c00
#define DWGREG1_END	0x2dff

#define ISREG0(r)	(r >= DWGREG0 && r <= DWGREG0_END)
#define ADRINDEX0(r)	(u_int8_t)((r - DWGREG0) >> 2)
#define ADRINDEX1(r)	(u_int8_t)(((r - DWGREG1) >> 2) | 0x80)
#define ADRINDEX(r)	(ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r)) 

#define MGA_VERBOSE 0
#define MGA_NUM_PRIM_BUFS 	8

#define PRIMLOCALS	u_int8_t tempIndex[4]; u_int32_t *dma_ptr; u_int32_t phys_head; \
			int outcount, num_dwords

#define PRIM_OVERFLOW(dev, dev_priv, length) do {			\
	drm_mga_prim_buf_t *tmp_buf =					\
 		dev_priv->prim_bufs[dev_priv->current_prim_idx];	\
	if( test_bit(MGA_BUF_NEEDS_OVERFLOW,				\
		  &tmp_buf->buffer_status)) {				\
 		mga_advance_primary(dev);				\
 		mga_dma_schedule(dev, 1);				\
 	} else if( tmp_buf->max_dwords - tmp_buf->num_dwords < length ||\
 	    tmp_buf->sec_used > MGA_DMA_BUF_NR/2) {			\
		set_bit(MGA_BUF_FORCE_FIRE, &tmp_buf->buffer_status);	\
 		mga_advance_primary(dev);				\
 		mga_dma_schedule(dev, 1);				\
	}								\
} while(0)

#define PRIMGETPTR(dev_priv) do {					\
	drm_mga_prim_buf_t *tmp_buf =					\
		dev_priv->prim_bufs[dev_priv->current_prim_idx];	\
	if(MGA_VERBOSE)							\
		DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__);		\
	dma_ptr = tmp_buf->current_dma_ptr;				\
	num_dwords = tmp_buf->num_dwords;				\
	phys_head = tmp_buf->phys_head;					\
	outcount = 0;							\
} while(0)

#define PRIMPTR(prim_buf) do {					\
	if(MGA_VERBOSE)						\
		DRM_DEBUG("PRIMPTR in %s\n", __FUNCTION__);	\
	dma_ptr = prim_buf->current_dma_ptr;			\
	num_dwords = prim_buf->num_dwords;			\
	phys_head = prim_buf->phys_head;			\
	outcount = 0;						\
} while(0)

#define PRIMFINISH(prim_buf) do {				\
	if (MGA_VERBOSE) {					\
		DRM_DEBUG( "PRIMFINISH in %s\n", __FUNCTION__);	\
                if (outcount & 3)				\
                      DRM_DEBUG(" --- truncation\n");	        \
        }							\
	prim_buf->num_dwords = num_dwords;			\
	prim_buf->current_dma_ptr = dma_ptr;			\
} while(0)

#define PRIMADVANCE(dev_priv)	do {				\
drm_mga_prim_buf_t *tmp_buf = 					\
	dev_priv->prim_bufs[dev_priv->current_prim_idx];	\
	if (MGA_VERBOSE) {					\
		DRM_DEBUG("PRIMADVANCE in %s\n", __FUNCTION__);	\
                if (outcount & 3)				\
                      DRM_DEBUG(" --- truncation\n");	\
        }							\
	tmp_buf->num_dwords = num_dwords;      			\
	tmp_buf->current_dma_ptr = dma_ptr;    			\
} while (0)

#define PRIMUPDATE(dev_priv)	do {					\
	drm_mga_prim_buf_t *tmp_buf =					\
		dev_priv->prim_bufs[dev_priv->current_prim_idx];	\
	tmp_buf->sec_used++;						\
} while (0)

#define AGEBUF(dev_priv, buf_priv)	do {				\
	drm_mga_prim_buf_t *tmp_buf =					\
		dev_priv->prim_bufs[dev_priv->current_prim_idx];	\
	buf_priv->my_freelist->age = tmp_buf->prim_age;			\
} while (0)


#define PRIMOUTREG(reg, val) do {					\
	tempIndex[outcount]=ADRINDEX(reg);				\
	dma_ptr[1+outcount] = val;					\
	if (MGA_VERBOSE)						\
		DRM_DEBUG("   PRIMOUT %d: 0x%x -- 0x%x\n",		\
		       num_dwords + 1 + outcount, ADRINDEX(reg), val);	\
	if( ++outcount == 4) {						\
		outcount = 0;						\