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/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */

/*
 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 * Authors:
 *    Rob Clark <robclark@freedesktop.org>
 */

#ifndef FREEDRENO_PRIV_H_
#define FREEDRENO_PRIV_H_

#ifdef HAVE_CONFIG_H
#include "config.h"
#endif

#include <stdlib.h>
#include <errno.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include <fcntl.h>
#include <sys/ioctl.h>
#include <pthread.h>
#include <stdio.h>
#include <assert.h>

#include "libdrm.h"
#include "xf86drm.h"
#include "xf86atomic.h"

#include "list.h"

#include "freedreno_drmif.h"
#include "freedreno_ringbuffer.h"
#include "drm.h"

struct fd_device_funcs {
	int (*bo_new_handle)(struct fd_device *dev, uint32_t size,
			uint32_t flags, uint32_t *handle);
	struct fd_bo * (*bo_from_handle)(struct fd_device *dev,
			uint32_t size, uint32_t handle);
	struct fd_pipe * (*pipe_new)(struct fd_device *dev, enum fd_pipe_id id);
	void (*destroy)(struct fd_device *dev);
};

struct fd_bo_bucket {
	uint32_t size;
	struct list_head list;
};

struct fd_device {
	int fd;
	atomic_t refcnt;

	/* tables to keep track of bo's, to avoid "evil-twin" fd_bo objects:
	 *
	 *   handle_table: maps handle to fd_bo
	 *   name_table: maps flink name to fd_bo
	 *
	 * We end up needing two tables, because DRM_IOCTL_GEM_OPEN always
	 * returns a new handle.  So we need to figure out if the bo is already
	 * open in the process first, before calling gem-open.
	 */
	void *handle_table, *name_table;

	struct fd_device_funcs *funcs;

	struct fd_bo_bucket cache_bucket[14 * 4];
	int num_buckets;
	time_t time;

	int closefd;        /* call close(fd) upon destruction */
};

void fd_cleanup_bo_cache(struct fd_device *dev, time_t time);

/* for where @table_lock is already held: */
void fd_device_del_locked(struct fd_device *dev);

struct fd_pipe_funcs {
	struct fd_ringbuffer * (*ringbuffer_new)(struct fd_pipe *pipe, uint32_t size);
	int (*get_param)(struct fd_pipe *pipe, enum fd_param_id param, uint64_t *value);
	int (*wait)(struct fd_pipe *pipe, uint32_t timestamp);
	void (*destroy)(struct fd_pipe *pipe);
};

struct fd_pipe {
	struct fd_device *dev;
	enum fd_pipe_id id;
	struct fd_pipe_funcs *funcs;
};

struct fd_ringmarker {
	struct fd_ringbuffer *ring;
	uint32_t *cur;
};

struct fd_ringbuffer_funcs {
	void * (*hostptr)(struct fd_ringbuffer *ring);
	int (*flush)(struct fd_ringbuffer *ring, uint32_t *last_start);
	void (*reset)(struct fd_ringbuffer *ring);
	void (*emit_reloc)(struct fd_ringbuffer *ring,
			const struct fd_reloc *reloc);
	void (*emit_reloc_ring)(struct fd_ringbuffer *ring,
			struct fd_ringmarker *target, struct fd_ringmarker *end);
	void (*destroy)(struct fd_ringbuffer *ring);
};

struct fd_bo_funcs {
	int (*offset)(struct fd_bo *bo, uint64_t *offset);
	int (*cpu_prep)(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op);
	void (*cpu_fini)(struct fd_bo *bo);
	void (*destroy)(struct fd_bo *bo);
};

struct fd_bo {
	struct fd_device *dev;
	uint32_t size;
	uint32_t handle;
	uint32_t name;
	int fd;          /* dmabuf handle */
	void *map;
	atomic_t refcnt;
	struct fd_bo_funcs *funcs;

	int bo_reuse;
	struct list_head list;   /* bucket-list entry */
	time_t free_time;        /* time when added to bucket-list */
};

#define ALIGN(v,a) (((v) + (a) - 1) & ~((a) - 1))
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))

#define enable_debug 0  /* TODO make dynamic */

#define INFO_MSG(fmt, ...) \
		do { drmMsg("[I] "fmt " (%s:%d)\n", \
				##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0)
#define DEBUG_MSG(fmt, ...) \
		do if (enable_debug) { drmMsg("[D] "fmt " (%s:%d)\n", \
				##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0)
#define WARN_MSG(fmt, ...) \
		do { drmMsg("[W] "fmt " (%s:%d)\n", \
				##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0)
#define ERROR_MSG(fmt, ...) \
		do { drmMsg("[E] " fmt " (%s:%d)\n", \
				##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0)

#define U642VOID(x) ((void *)(unsigned long)(x))
#define VOID2U64(x) ((uint64_t)(unsigned long)(x))

#endif /* FREEDRENO_PRIV_H_ */
id='n651' href='#n651'>651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902
#include "drmP.h"
#include "drm.h"
#include "nouveau_drv.h"
#include "nouveau_drm.h"

/*
 * NV20
 * -----
 * There are 3 families :
 * NV20 is 0x10de:0x020*
 * NV25/28 is 0x10de:0x025* / 0x10de:0x028*
 * NV2A is 0x10de:0x02A0
 *
 * NV30
 * -----
 * There are 3 families :
 * NV30/31 is 0x10de:0x030* / 0x10de:0x031*
 * NV34 is 0x10de:0x032*
 * NV35/36 is 0x10de:0x033* / 0x10de:0x034*
 *
 * Not seen in the wild, no dumps (probably NV35) :
 * NV37 is 0x10de:0x00fc, 0x10de:0x00fd
 * NV38 is 0x10de:0x0333, 0x10de:0x00fe
 *
 */

#define NV20_GRCTX_SIZE (3580*4)
#define NV25_GRCTX_SIZE (3529*4)
#define NV2A_GRCTX_SIZE (3500*4)

#define NV30_31_GRCTX_SIZE (24392)
#define NV34_GRCTX_SIZE    (22000)
#define NV35_36_GRCTX_SIZE (22396)

static void nv20_graph_context_init(struct drm_device *dev,
                                    struct nouveau_gpuobj *ctx)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	int i;
/*
write32 #1 block at +0x00740adc NV_PRAMIN+0x40adc of 3369 (0xd29) elements:
+0x00740adc: ffff0000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740afc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b1c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b3c: 00000000 0fff0000 0fff0000 00000000 00000000 00000000 00000000 00000000
+0x00740b5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740bbc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740bdc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740bfc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

+0x00740c1c: 00000101 00000000 00000000 00000000 00000000 00000111 00000000 00000000
+0x00740c3c: 00000000 00000000 00000000 44400000 00000000 00000000 00000000 00000000
+0x00740c5c: 00000000 00000000 00000000 00000000 00000000 00000000 00030303 00030303
+0x00740c7c: 00030303 00030303 00000000 00000000 00000000 00000000 00080000 00080000
+0x00740c9c: 00080000 00080000 00000000 00000000 01012000 01012000 01012000 01012000
+0x00740cbc: 000105b8 000105b8 000105b8 000105b8 00080008 00080008 00080008 00080008
+0x00740cdc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740cfc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000
+0x00740d1c: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000
+0x00740d3c: 00000000 00000000 4b7fffff 00000000 00000000 00000000 00000000 00000000

+0x00740d5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740d7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740d9c: 00000001 00000000 00004000 00000000 00000000 00000001 00000000 00040000
+0x00740dbc: 00010000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740ddc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
...
*/
	INSTANCE_WR(ctx, (0x33c/4)+0, 0xffff0000);
	INSTANCE_WR(ctx, (0x33c/4)+25, 0x0fff0000);
	INSTANCE_WR(ctx, (0x33c/4)+26, 0x0fff0000);
	INSTANCE_WR(ctx, (0x33c/4)+80, 0x00000101);
	INSTANCE_WR(ctx, (0x33c/4)+85, 0x00000111);
	INSTANCE_WR(ctx, (0x33c/4)+91, 0x44400000);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+102+i, 0x00030303);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+110+i, 0x00080000);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+116+i, 0x01012000);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+120+i, 0x000105b8);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+124+i, 0x00080008);
	for (i = 0; i < 16; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+136+i, 0x07ff0000);
	INSTANCE_WR(ctx, (0x33c/4)+154, 0x4b7fffff);
	INSTANCE_WR(ctx, (0x33c/4)+176, 0x00000001);
	INSTANCE_WR(ctx, (0x33c/4)+178, 0x00004000);
	INSTANCE_WR(ctx, (0x33c/4)+181, 0x00000001);
	INSTANCE_WR(ctx, (0x33c/4)+183, 0x00040000);
	INSTANCE_WR(ctx, (0x33c/4)+184, 0x00010000);

/*
...
+0x0074239c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x007423bc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x007423dc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x007423fc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
...
+0x00742bdc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742bfc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742c1c: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742c3c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
...
*/
	for (i = 0; i < 0x880; i += 0x10) {
		INSTANCE_WR(ctx, ((0x1c1c + i)/4)+0, 0x10700ff9);
		INSTANCE_WR(ctx, ((0x1c1c + i)/4)+1, 0x0436086c);
		INSTANCE_WR(ctx, ((0x1c1c + i)/4)+2, 0x000c001b);
	}

/*
write32 #1 block at +0x00742fbc NV_PRAMIN+0x42fbc of 4 (0x4) elements:
+0x00742fbc: 3f800000 00000000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x281c/4), 0x3f800000);

/*
write32 #1 block at +0x00742ffc NV_PRAMIN+0x42ffc of 12 (0xc) elements:
+0x00742ffc: 40000000 3f800000 3f000000 00000000 40000000 3f800000 00000000 bf800000
+0x0074301c: 00000000 bf800000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x285c/4)+0, 0x40000000);
	INSTANCE_WR(ctx, (0x285c/4)+1, 0x3f800000);
	INSTANCE_WR(ctx, (0x285c/4)+2, 0x3f000000);
	INSTANCE_WR(ctx, (0x285c/4)+4, 0x40000000);
	INSTANCE_WR(ctx, (0x285c/4)+5, 0x3f800000);
	INSTANCE_WR(ctx, (0x285c/4)+7, 0xbf800000);
	INSTANCE_WR(ctx, (0x285c/4)+9, 0xbf800000);

/*
write32 #1 block at +0x00742fcc NV_PRAMIN+0x42fcc of 4 (0x4) elements:
+0x00742fcc: 00000000 3f800000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x282c/4)+1, 0x3f800000);

/*
write32 #1 block at +0x0074302c NV_PRAMIN+0x4302c of 4 (0x4) elements:
+0x0074302c: 00000000 00000000 00000000 00000000
write32 #1 block at +0x00743c9c NV_PRAMIN+0x43c9c of 4 (0x4) elements:
+0x00743c9c: 00000000 00000000 00000000 00000000
write32 #1 block at +0x00743c3c NV_PRAMIN+0x43c3c of 8 (0x8) elements:
+0x00743c3c: 00000000 00000000 000fe000 00000000 00000000 00000000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x349c/4)+2, 0x000fe000);

/*
write32 #1 block at +0x00743c6c NV_PRAMIN+0x43c6c of 4 (0x4) elements:
+0x00743c6c: 00000000 00000000 00000000 00000000
write32 #1 block at +0x00743ccc NV_PRAMIN+0x43ccc of 4 (0x4) elements:
+0x00743ccc: 00000000 000003f8 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x352c/4)+1, 0x000003f8);

/* write32 #1 NV_PRAMIN+0x43ce0 <- 0x002fe000 */
	INSTANCE_WR(ctx, 0x3540/4, 0x002fe000);

/*
write32 #1 block at +0x00743cfc NV_PRAMIN+0x43cfc of 8 (0x8) elements:
+0x00743cfc: 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c
*/
	for (i = 0; i < 8; ++i)
		INSTANCE_WR(ctx, (0x355c/4)+i, 0x001c527c);
}

static void nv2a_graph_context_init(struct drm_device *dev,
                                    struct nouveau_gpuobj *ctx)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	int i;

	INSTANCE_WR(ctx, 0x33c/4, 0xffff0000);
	for(i = 0x3a0; i< 0x3a8; i += 4)
		INSTANCE_WR(ctx, i/4, 0x0fff0000);
	INSTANCE_WR(ctx, 0x47c/4, 0x00000101);
	INSTANCE_WR(ctx, 0x490/4, 0x00000111);
	INSTANCE_WR(ctx, 0x4a8/4, 0x44400000);
	for(i = 0x4d4; i< 0x4e4; i += 4)
		INSTANCE_WR(ctx, i/4, 0x00030303);
	for(i = 0x4f4; i< 0x504; i += 4)
		INSTANCE_WR(ctx, i/4, 0x00080000);
	for(i = 0x50c; i< 0x51c; i += 4)
		INSTANCE_WR(ctx, i/4, 0x01012000);
	for(i = 0x51c; i< 0x52c; i += 4)
		INSTANCE_WR(ctx, i/4, 0x000105b8);
	for(i = 0x52c; i< 0x53c; i += 4)
		INSTANCE_WR(ctx, i/4, 0x00080008);
	for(i = 0x55c; i< 0x59c; i += 4)
		INSTANCE_WR(ctx, i/4, 0x07ff0000);
	INSTANCE_WR(ctx, 0x5a4/4, 0x4b7fffff);
	INSTANCE_WR(ctx, 0x5fc/4, 0x00000001);
	INSTANCE_WR(ctx, 0x604/4, 0x00004000);
	INSTANCE_WR(ctx, 0x610/4, 0x00000001);
	INSTANCE_WR(ctx, 0x618/4, 0x00040000);
	INSTANCE_WR(ctx, 0x61c/4, 0x00010000);

	for (i=0x1a9c; i <= 0x22fc/4; i += 32) {
		INSTANCE_WR(ctx, i/4    , 0x10700ff9);
		INSTANCE_WR(ctx, i/4 + 1, 0x0436086c);
		INSTANCE_WR(ctx, i/4 + 2, 0x000c001b);
	}

	INSTANCE_WR(ctx, 0x269c/4, 0x3f800000);
	INSTANCE_WR(ctx, 0x26b0/4, 0x3f800000);
	INSTANCE_WR(ctx, 0x26dc/4, 0x40000000);
	INSTANCE_WR(ctx, 0x26e0/4, 0x3f800000);
	INSTANCE_WR(ctx, 0x26e4/4, 0x3f000000);
	INSTANCE_WR(ctx, 0x26ec/4, 0x40000000);
	INSTANCE_WR(ctx, 0x26f0/4, 0x3f800000);
	INSTANCE_WR(ctx, 0x26f8/4, 0xbf800000);
	INSTANCE_WR(ctx, 0x2700/4, 0xbf800000);
	INSTANCE_WR(ctx, 0x3024/4, 0x000fe000);
	INSTANCE_WR(ctx, 0x30a0/4, 0x000003f8);
	INSTANCE_WR(ctx, 0x33fc/4, 0x002fe000);