/* r128_state.c -- State support for r128 -*- linux-c -*-
* Created: Thu Jan 27 02:53:43 2000 by gareth@valinux.com
*
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Gareth Hughes <gareth@valinux.com>
*/
#include "drmP.h"
#include "drm.h"
#include "r128_drm.h"
#include "r128_drv.h"
/* Interface history:
*
* ?? - ??
* 2.4 - Add support for ycbcr textures (no new ioctls)
* 2.5 - Add FLIP ioctl, disable FULLSCREEN.
*/
drm_ioctl_desc_t r128_ioctls[] = {
[DRM_IOCTL_NR(DRM_R128_INIT)] = {r128_cce_init, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_START)] = {r128_cce_start, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_STOP)] = {r128_cce_stop, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_RESET)] = {r128_cce_reset, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_IDLE)] = {r128_cce_idle, 1, 0},
[DRM_IOCTL_NR(DRM_R128_RESET)] = {r128_engine_reset, 1, 0},
[DRM_IOCTL_NR(DRM_R128_FULLSCREEN)] = {r128_fullscreen, 1, 0},
[DRM_IOCTL_NR(DRM_R128_SWAP)] = {r128_cce_swap, 1, 0},
[DRM_IOCTL_NR(DRM_R128_FLIP)] = {r128_cce_flip, 1, 0},
[DRM_IOCTL_NR(DRM_R128_CLEAR)] = {r128_cce_clear, 1, 0},
[DRM_IOCTL_NR(DRM_R128_VERTEX)] = {r128_cce_vertex, 1, 0},
[DRM_IOCTL_NR(DRM_R128_INDICES)] = {r128_cce_indices, 1, 0},
[DRM_IOCTL_NR(DRM_R128_BLIT)] = {r128_cce_blit, 1, 0},
[DRM_IOCTL_NR(DRM_R128_DEPTH)] = {r128_cce_depth, 1, 0},
[DRM_IOCTL_NR(DRM_R128_STIPPLE)] = {r128_cce_stipple, 1, 0},
[DRM_IOCTL_NR(DRM_R128_INDIRECT)] = {r128_cce_indirect, 1, 1},
[DRM_IOCTL_NR(DRM_R128_GETPARAM)] = {r128_getparam, 1, 0},
};
int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls);
/* ================================================================
* CCE hardware state programming functions
*/
static void r128_emit_clip_rects(drm_r128_private_t * dev_priv,
drm_clip_rect_t * boxes, int count)
{
u32 aux_sc_cntl = 0x00000000;
RING_LOCALS;
DRM_DEBUG(" %s\n", __FUNCTION__);
BEGIN_RING((count < 3 ? count : 3) * 5 + 2);
if (count >= 1) {
OUT_RING(CCE_PACKET0(R128_AUX1_SC_LEFT, 3));
OUT_RING(boxes[0].x1);
OUT_RING(boxes[0].x2 - 1);
OUT_RING(boxes[0].y1);
OUT_RING(boxes[0].y2 - 1);
aux_sc_cntl |= (R128_AUX1_SC_EN | R128_AUX1_SC_MODE_OR);
}
if (count >= 2) {
OUT_RING(CCE_PACKET0(R128_AUX2_SC_LEFT, 3));
OUT_RING(boxes[1].x1);
OUT_RING(boxes[1].x2 - 1);
OUT_RING(boxes[1].y1);
OUT_RING(boxes[1].y2 - 1);
aux_sc_cntl |= (R128_AUX2_SC_EN | R128_AUX2_SC_MODE_OR);
}
if (count >= 3) {
OUT_RING(CCE_PACKET0(R128_AUX3_SC_LEFT, 3));
OUT_RING(boxes[2].x1);
OUT_RING(boxes[2].x2 - 1);
OUT_RING(boxes[2].y1);
OUT_RING(boxes[2].y2 - 1);
aux_sc_cntl |= (R128_AUX3_SC_EN | R128_AUX3_SC_MODE_OR);
}
OUT_RING(CCE_PACKET0(R128_AUX_SC_CNTL, 0));
OUT_RING(aux_sc_cntl);
ADVANCE_RING();
}
static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv)
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG(" %s\n", __FUNCTION__);
BEGIN_RING(2);
OUT_RING(CCE_PACKET0(R128_SCALE_3D_CNTL, 0));
OUT_RING(ctx->scale_3d_cntl);
ADVANCE_RING();
}
static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv)
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG(" %s\n", __FUNCTION__);
BEGIN_RING(13);
OUT_RING(CCE_PACKET0(R128_DST_PITCH_OFFSET_C, 11));
OUT_RING(ctx->dst_pitch_offset_c);
OUT_RING(ctx->dp_gui_master_cntl_c);
OUT_RING(ctx->sc_top_left_c);
OUT_RING(ctx->sc_bottom_right_c);
OUT_RING(ctx->z_offset_c);
OUT_RING(ctx->z_pitch_c);
OUT_RING(ctx->z_sten_cntl_c);
OUT_RING(ctx->tex_cntl_c);
OUT_RING(ctx->misc_3d_state_cntl_reg);
OUT_RING(ctx->texture_clr_cmp_clr_c);
OUT_RING(ctx->texture_clr_cmp_msk_c);
OUT_RING(ctx->fog_color_c);
ADVANCE_RING();
}
static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv)
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG(" %s\n", __FUNCTION__);
BEGIN_RING(3);
OUT_RING(CCE_PACKET1(R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP));
OUT_RING(ctx->setup_cntl);
OUT_RING(ctx->pm4_vc_fpu_setup);
ADVANCE_RING();
}
static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv)
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG(" %s\n", __FUNCTION__);
BEGIN_RING(5);
OUT_RING(CCE_PACKET0(R128_DP_WRITE_MASK, 0));
OUT_RING(ctx->dp_write_mask);
OUT_RING(CCE_PACKET0(R128_STEN_REF_MASK_C, 1));
OUT_RING(ctx->sten_ref_mask_c);
OUT_RING(ctx->plane_3d_mask_c);
ADVANCE_RING();
}
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