#ifndef _I830_DRM_H_
#define _I830_DRM_H_

/* WARNING: These defines must be the same as what the Xserver uses.
 * if you change them, you must change the defines in the Xserver.
 *
 * KW: Actually, you can't ever change them because doing so would
 * break backwards compatibility.
 */

#ifndef _I830_DEFINES_
#define _I830_DEFINES_

#define I830_DMA_BUF_ORDER		12
#define I830_DMA_BUF_SZ 		(1<<I830_DMA_BUF_ORDER)
#define I830_DMA_BUF_NR 		256
#define I830_NR_SAREA_CLIPRECTS 	8

/* Each region is a minimum of 64k, and there are at most 64 of them.
 */
#define I830_NR_TEX_REGIONS 64
#define I830_LOG_MIN_TEX_REGION_SIZE 16

/* KW: These aren't correct but someone set them to two and then
 * released the module.  Now we can't change them as doing so would
 * break backwards compatibility.
 */
#define I830_TEXTURE_COUNT	2
#define I830_TEXBLEND_COUNT	I830_TEXTURE_COUNT

#define I830_TEXBLEND_SIZE	12	/* (4 args + op) * 2 + COLOR_FACTOR */

#define I830_UPLOAD_CTX			0x1
#define I830_UPLOAD_BUFFERS		0x2
#define I830_UPLOAD_CLIPRECTS		0x4
#define I830_UPLOAD_TEX0_IMAGE		0x100 /* handled clientside */
#define I830_UPLOAD_TEX0_CUBE		0x200 /* handled clientside */
#define I830_UPLOAD_TEX1_IMAGE		0x400 /* handled clientside */
#define I830_UPLOAD_TEX1_CUBE		0x800 /* handled clientside */
#define I830_UPLOAD_TEX2_IMAGE		0x1000 /* handled clientside */
#define I830_UPLOAD_TEX2_CUBE		0x2000 /* handled clientside */
#define I830_UPLOAD_TEX3_IMAGE		0x4000 /* handled clientside */
#define I830_UPLOAD_TEX3_CUBE		0x8000 /* handled clientside */
#define I830_UPLOAD_TEX_N_IMAGE(n)	(0x100 << (n * 2))
#define I830_UPLOAD_TEX_N_CUBE(n)	(0x200 << (n * 2))
#define I830_UPLOAD_TEXIMAGE_MASK	0xff00
#define I830_UPLOAD_TEX0			0x10000
#define I830_UPLOAD_TEX1			0x20000
#define I830_UPLOAD_TEX2			0x40000
#define I830_UPLOAD_TEX3			0x80000
#define I830_UPLOAD_TEX_N(n)		(0x10000 << (n))
#define I830_UPLOAD_TEX_MASK		0xf0000
#define I830_UPLOAD_TEXBLEND0		0x100000
#define I830_UPLOAD_TEXBLEND1		0x200000
#define I830_UPLOAD_TEXBLEND2		0x400000
#define I830_UPLOAD_TEXBLEND3		0x800000
#define I830_UPLOAD_TEXBLEND_N(n)	(0x100000 << (n))
#define I830_UPLOAD_TEXBLEND_MASK	0xf00000
#define I830_UPLOAD_TEX_PALETTE_N(n)    (0x1000000 << (n))
#define I830_UPLOAD_TEX_PALETTE_SHARED	0x4000000
#define I830_UPLOAD_STIPPLE         	0x8000000

/* Indices into buf.Setup where various bits of state are mirrored per
 * context and per buffer.  These can be fired at the card as a unit,
 * or in a piecewise fashion as required.
 */

/* Destbuffer state 
 *    - backbuffer linear offset and pitch -- invarient in the current dri
 *    - zbuffer linear offset and pitch -- also invarient
 *    - drawing origin in back and depth buffers.
 *
 * Keep the depth/back buffer state here to accommodate private buffers
 * in the future.
 */

#define I830_DESTREG_CBUFADDR 0
#define I830_DESTREG_DBUFADDR 1
#define I830_DESTREG_DV0 2
#define I830_DESTREG_DV1 3
#define I830_DESTREG_SENABLE 4
#define I830_DESTREG_SR0 5
#define I830_DESTREG_SR1 6
#define I830_DESTREG_SR2 7
#define I830_DESTREG_DR0 8
#define I830_DESTREG_DR1 9
#define I830_DESTREG_DR2 10
#define I830_DESTREG_DR3 11
#define I830_DESTREG_DR4 12
#define I830_DEST_SETUP_SIZE 13

/* Context state
 */
#define I830_CTXREG_STATE1		0
#define I830_CTXREG_STATE2		1
#define I830_CTXREG_STATE3		2
#define I830_CTXREG_STATE4		3
#define I830_CTXREG_STATE5		4
#define I830_CTXREG_IALPHAB		5
#define I830_CTXREG_STENCILTST		6
#define I830_CTXREG_ENABLES_1		7
#define I830_CTXREG_ENABLES_2		8
#define I830_CTXREG_AA			9
#define I830_CTXREG_FOGCOLOR		10
#define I830_CTXREG_BLENDCOLR0		11
#define I830_CTXREG_BLENDCOLR		12 /* Dword 1 of 2 dword command */
#define I830_CTXREG_VF			13
#define I830_CTXREG_VF2			14
#define I830_CTXREG_MCSB0		15
#define I830_CTXREG_MCSB1		16
#define I830_CTX_SETUP_SIZE		17

/* 1.3: Stipple state
 */ 
#define I830_STPREG_ST0 0
#define I830_STPREG_ST1 1
#define I830_STP_SETUP_SIZE 2


/* Texture state (per tex unit)
 */

#define I830_TEXREG_MI0	0	/* GFX_OP_MAP_INFO (6 dwords) */
#define I830_TEXREG_MI1	1
#define I830_TEXREG_MI2	2
#define I830_TEXREG_MI3	3
#define I830_TEXREG_MI4	4
#define I830_TEXREG_MI5	5
#define I830_TEXREG_MF	6	/* GFX_OP_MAP_FILTER */
#define I830_TEXREG_MLC	7	/* GFX_OP_MAP_LOD_CTL */
#define I830_TEXREG_MLL	8	/* GFX_OP_MAP_LOD_LIMITS */
#define I830_TEXREG_MCS	9	/* GFX_OP_MAP_COORD_SETS */
#define I830_TEX_SETUP_SIZE 10

#define I830_TEXREG_TM0LI      0 /* load immediate 2 texture map n */
#define I830_TEXREG_TM0S0      1
#define I830_TEXREG_TM0S1      2
#define I830_TEXREG_TM0S2      3
#define I830_TEXREG_TM0S3      4
#define I830_TEXREG_TM0S4      5
#define I830_TEXREG_NOP0       6       /* noop */
#define I830_TEXREG_NOP1       7       /* noop */
#define I830_TEXREG_NOP2       8       /* noop */
#define __I830_TEXREG_MCS      9       /* GFX_OP_MAP_COORD_SETS -- shared */
#define __I830_TEX_SETUP_SIZE   10

#define I830_FRONT   0x1
#define I830_BACK    0x2
#define I830_DEPTH   0x4

#endif /* _I830_DEFINES_ */

typedef struct _drm_i830_init {
	enum {
		I830_INIT_DMA = 0x01,
		I830_CLEANUP_DMA = 0x02
	} func;
	unsigned int mmio_offset;
	unsigned int buffers_offset;
	int sarea_priv_offset;
	unsigned int ring_start;
	unsigned int ring_end;
	unsigned int ring_size;
	unsigned int front_offset;
	unsigned int back_offset;
	unsigned int depth_offset;
	unsigned int w;
	unsigned int h;
	unsigned int pitch;
	unsigned int pitch_bits;
	unsigned int back_pitch;
	unsigned int depth_pitch;
	unsigned int cpp;
} drm_i830_init_t;

/* Warning: If you change the SAREA structure you must change the Xserver
 * structure as well */

typedef struct _drm_i830_tex_region {
	unsigned char next, prev; /* indices to form a circular LRU  */
	unsigned char in_use;	/* owned by a client, or free? */
	int age;		/* tracked by clients to update local LRU's */
} drm_i830_tex_region_t;

typedef struct _drm_i830_sarea {
	unsigned int ContextState[I830_CTX_SETUP_SIZE];
   	unsigned int BufferState[I830_DEST_SETUP_SIZE];
	unsigned int TexState[I830_TEXTURE_COUNT][I830_TEX_SETUP_SIZE];
	unsigned int TexBlendState[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE];
	unsigned int TexBlendStateWordsUsed[I830_TEXBLEND_COUNT];
	unsigned int Palette[2][256];
   	unsigned int dirty;

	unsigned int nbox;
	drm_clip_rect_t boxes[I830_NR_SAREA_CLIPRECTS];

	/* Maintain an LRU of contiguous regions of texture space.  If
	 * you think you own a region of texture memory, and it has an
	 * age different to the one you set, then you are mistaken and
	 * it has been stolen by another client.  If global texAge
	 * hasn't changed, there is no need to walk the list.
	 *
	 * These regions can be used as a proxy for the fine-grained
	 * texture information of other clients - by maintaining them
	 * in the same lru which is used to age their own textures,
	 * clients have an approximate lru for the whole of global
	 * texture space, and can make informed decisions as to which
	 * areas to kick out.  There is no need to choose whether to
	 * kick out your own texture or someone else's - simply eject
	 * them all in LRU order.  
	 */

	drm_i830_tex_region_t texList[I830_NR_TEX_REGIONS+1]; 
				/* Last elt is sentinal */
        int texAge;		/* last time texture was uploaded */
        int last_enqueue;	/* last time a buffer was enqueued */
	int last_dispatch;	/* age of the most recently dispatched buffer */
	int last_quiescent;     /*  */
	int ctxOwner;		/* last context to upload state */

	int vertex_prim;

        int pf_enabled;               /* is pageflipping allowed? */
        int pf_active;               
        int pf_current_page;	    /* which buffer is being displayed? */

        int perf_boxes;             /* performance boxes to be displayed */
   
        /* Here's the state for texunits 2,3:
	 */
	unsigned int TexState2[I830_TEX_SETUP_SIZE];
	unsigned int TexBlendState2[I830_TEXBLEND_SIZE];
	unsigned int TexBlendStateWordsUsed2;

	unsigned int TexState3[I830_TEX_SETUP_SIZE];
	unsigned int TexBlendState3[I830_TEXBLEND_SIZE];
	unsigned int TexBlendStateWordsUsed3;

	unsigned int StippleState[I830_STP_SETUP_SIZE];
} drm_i830_sarea_t;

/* Flags for perf_boxes
 */
#define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
#define I830_BOX_FLIP          0x2 /* populated by kernel */
#define I830_BOX_WAIT          0x4 /* populated by kernel & client */
#define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
#define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */


/* I830 specific ioctls
 * The device specific ioctl range is 0x40 to 0x79.
 */
#define DRM_IOCTL_I830_INIT		DRM_IOW( 0x40, drm_i830_init_t)
#define DRM_IOCTL_I830_VERTEX		DRM_IOW( 0x41, drm_i830_vertex_t)
#define DRM_IOCTL_I830_CLEAR		DRM_IOW( 0x42, drm_i830_clear_t)
#define DRM_IOCTL_I830_FLUSH		DRM_IO ( 0x43)
#define DRM_IOCTL_I830_GETAGE		DRM_IO ( 0x44)
#define DRM_IOCTL_I830_GETBUF		DRM_IOWR(0x45, drm_i830_dma_t)
#define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
#define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
#define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
#define DRM_IOCTL_I830_FLIP		DRM_IO ( 0x49)
#define DRM_IOCTL_I830_IRQ_EMIT         DRM_IOWR(0x4a, drm_i830_irq_emit_t)
#define DRM_IOCTL_I830_IRQ_WAIT         DRM_IOW( 0x4b, drm_i830_irq_wait_t)
#define DRM_IOCTL_I830_GETPARAM         DRM_IOWR(0x4c, drm_i830_getparam_t)
#define DRM_IOCTL_I830_SETPARAM         DRM_IOWR(0x4d, drm_i830_setparam_t)

typedef struct _drm_i830_clear {
	int clear_color;
	int clear_depth;
	int flags;
	unsigned int clear_colormask;
	unsigned int clear_depthmask;
} drm_i830_clear_t;



/* These may be placeholders if we have more cliprects than
 * I830_NR_SAREA_CLIPRECTS.  In that case, the client sets discard to
 * false, indicating that the buffer will be dispatched again with a
 * new set of cliprects.
 */
typedef struct _drm_i830_vertex {
   	int idx;		/* buffer index */
	int used;		/* nr bytes in use */
	int discard;		/* client is finished with the buffer? */
} drm_i830_vertex_t;

typedef struct _drm_i830_copy_t {
   	int idx;		/* buffer index */
	int used;		/* nr bytes in use */
	void __user *address;		/* Address to copy from */
} drm_i830_copy_t;

typedef struct drm_i830_dma {
	void __user *virtual;
	int request_idx;
	int request_size;
	int granted;
} drm_i830_dma_t;


/* 1.3: Userspace can request & wait on irq's:
 */
typedef struct drm_i830_irq_emit {
	int __user *irq_seq;
} drm_i830_irq_emit_t;

typedef struct drm_i830_irq_wait {
	int irq_seq;
} drm_i830_irq_wait_t;


/* 1.3: New ioctl to query kernel params:
 */
#define I830_PARAM_IRQ_ACTIVE            1

typedef struct drm_i830_getparam {
	int param;
	int __user *value;
} drm_i830_getparam_t;


/* 1.3: New ioctl to set kernel params:
 */
#define I830_SETPARAM_USE_MI_BATCHBUFFER_START            1

typedef struct drm_i830_setparam {
	int param;
	int value;
} drm_i830_setparam_t;


#endif /* _I830_DRM_H_ */
n246'>246</a>
<a id='n247' href='#n247'>247</a>
<a id='n248' href='#n248'>248</a>
<a id='n249' href='#n249'>249</a>
<a id='n250' href='#n250'>250</a>
<a id='n251' href='#n251'>251</a>
<a id='n252' href='#n252'>252</a>
<a id='n253' href='#n253'>253</a>
<a id='n254' href='#n254'>254</a>
<a id='n255' href='#n255'>255</a>
<a id='n256' href='#n256'>256</a>
<a id='n257' href='#n257'>257</a>
<a id='n258' href='#n258'>258</a>
<a id='n259' href='#n259'>259</a>
<a id='n260' href='#n260'>260</a>
<a id='n261' href='#n261'>261</a>
<a id='n262' href='#n262'>262</a>
<a id='n263' href='#n263'>263</a>
<a id='n264' href='#n264'>264</a>
<a id='n265' href='#n265'>265</a>
<a id='n266' href='#n266'>266</a>
<a id='n267' href='#n267'>267</a>
<a id='n268' href='#n268'>268</a>
<a id='n269' href='#n269'>269</a>
<a id='n270' href='#n270'>270</a>
<a id='n271' href='#n271'>271</a>
<a id='n272' href='#n272'>272</a>
<a id='n273' href='#n273'>273</a>
<a id='n274' href='#n274'>274</a>
<a id='n275' href='#n275'>275</a>
<a id='n276' href='#n276'>276</a>
<a id='n277' href='#n277'>277</a>
<a id='n278' href='#n278'>278</a>
<a id='n279' href='#n279'>279</a>
<a id='n280' href='#n280'>280</a>
<a id='n281' href='#n281'>281</a>
<a id='n282' href='#n282'>282</a>
<a id='n283' href='#n283'>283</a>
<a id='n284' href='#n284'>284</a>
<a id='n285' href='#n285'>285</a>
<a id='n286' href='#n286'>286</a>
<a id='n287' href='#n287'>287</a>
<a id='n288' href='#n288'>288</a>
<a id='n289' href='#n289'>289</a>
<a id='n290' href='#n290'>290</a>
<a id='n291' href='#n291'>291</a>
<a id='n292' href='#n292'>292</a>
<a id='n293' href='#n293'>293</a>
<a id='n294' href='#n294'>294</a>
<a id='n295' href='#n295'>295</a>
<a id='n296' href='#n296'>296</a>
<a id='n297' href='#n297'>297</a>
<a id='n298' href='#n298'>298</a>
<a id='n299' href='#n299'>299</a>
<a id='n300' href='#n300'>300</a>
<a id='n301' href='#n301'>301</a>
<a id='n302' href='#n302'>302</a>
<a id='n303' href='#n303'>303</a>
<a id='n304' href='#n304'>304</a>
<a id='n305' href='#n305'>305</a>
<a id='n306' href='#n306'>306</a>
<a id='n307' href='#n307'>307</a>
<a id='n308' href='#n308'>308</a>
<a id='n309' href='#n309'>309</a>
<a id='n310' href='#n310'>310</a>
<a id='n311' href='#n311'>311</a>
<a id='n312' href='#n312'>312</a>
<a id='n313' href='#n313'>313</a>
<a id='n314' href='#n314'>314</a>
<a id='n315' href='#n315'>315</a>
<a id='n316' href='#n316'>316</a>
<a id='n317' href='#n317'>317</a>
<a id='n318' href='#n318'>318</a>
<a id='n319' href='#n319'>319</a>
<a id='n320' href='#n320'>320</a>
<a id='n321' href='#n321'>321</a>
<a id='n322' href='#n322'>322</a>
<a id='n323' href='#n323'>323</a>
<a id='n324' href='#n324'>324</a>
<a id='n325' href='#n325'>325</a>
<a id='n326' href='#n326'>326</a>
<a id='n327' href='#n327'>327</a>
<a id='n328' href='#n328'>328</a>
<a id='n329' href='#n329'>329</a>
<a id='n330' href='#n330'>330</a>
<a id='n331' href='#n331'>331</a>
<a id='n332' href='#n332'>332</a>
<a id='n333' href='#n333'>333</a>
<a id='n334' href='#n334'>334</a>
<a id='n335' href='#n335'>335</a>
<a id='n336' href='#n336'>336</a>
<a id='n337' href='#n337'>337</a>
<a id='n338' href='#n338'>338</a>
<a id='n339' href='#n339'>339</a>
<a id='n340' href='#n340'>340</a>
<a id='n341' href='#n341'>341</a>
<a id='n342' href='#n342'>342</a>
<a id='n343' href='#n343'>343</a>
<a id='n344' href='#n344'>344</a>
<a id='n345' href='#n345'>345</a>
<a id='n346' href='#n346'>346</a>
<a id='n347' href='#n347'>347</a>
<a id='n348' href='#n348'>348</a>
<a id='n349' href='#n349'>349</a>
<a id='n350' href='#n350'>350</a>
<a id='n351' href='#n351'>351</a>
<a id='n352' href='#n352'>352</a>
<a id='n353' href='#n353'>353</a>
</pre></td>
<td class='lines'><pre><code><span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9400</span><span class="hl opt">,</span> R600_9400<span class="hl opt">,</span> R600<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9401</span><span class="hl opt">,</span> R600_9401<span class="hl opt">,</span> R600<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9402</span><span class="hl opt">,</span> R600_9402<span class="hl opt">,</span> R600<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9403</span><span class="hl opt">,</span> R600_9403<span class="hl opt">,</span> R600<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9405</span><span class="hl opt">,</span> R600_9405<span class="hl opt">,</span> R600<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x940A</span><span class="hl opt">,</span> R600_940A<span class="hl opt">,</span> R600<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x940B</span><span class="hl opt">,</span> R600_940B<span class="hl opt">,</span> R600<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x940F</span><span class="hl opt">,</span> R600_940F<span class="hl opt">,</span> R600<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94C0</span><span class="hl opt">,</span> RV610_94C0<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94C1</span><span class="hl opt">,</span> RV610_94C1<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94C3</span><span class="hl opt">,</span> RV610_94C3<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94C4</span><span class="hl opt">,</span> RV610_94C4<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94C5</span><span class="hl opt">,</span> RV610_94C5<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94C6</span><span class="hl opt">,</span> RV610_94C6<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94C7</span><span class="hl opt">,</span> RV610_94C7<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94C8</span><span class="hl opt">,</span> RV610_94C8<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94C9</span><span class="hl opt">,</span> RV610_94C9<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94CB</span><span class="hl opt">,</span> RV610_94CB<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94CC</span><span class="hl opt">,</span> RV610_94CC<span class="hl opt">,</span> RV610<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94CD</span><span class="hl opt">,</span> RV610_94CD<span class="hl opt">,</span> RV610<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9580</span><span class="hl opt">,</span> RV630_9580<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9581</span><span class="hl opt">,</span> RV630_9581<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9583</span><span class="hl opt">,</span> RV630_9583<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9586</span><span class="hl opt">,</span> RV630_9586<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9587</span><span class="hl opt">,</span> RV630_9587<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9588</span><span class="hl opt">,</span> RV630_9588<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9589</span><span class="hl opt">,</span> RV630_9589<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x958A</span><span class="hl opt">,</span> RV630_958A<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x958B</span><span class="hl opt">,</span> RV630_958B<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x958C</span><span class="hl opt">,</span> RV630_958C<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x958D</span><span class="hl opt">,</span> RV630_958D<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x958E</span><span class="hl opt">,</span> RV630_958E<span class="hl opt">,</span> RV630<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x958F</span><span class="hl opt">,</span> RV630_958F<span class="hl opt">,</span> RV630<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9500</span><span class="hl opt">,</span> RV670_9500<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9501</span><span class="hl opt">,</span> RV670_9501<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9504</span><span class="hl opt">,</span> RV670_9504<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9505</span><span class="hl opt">,</span> RV670_9505<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9506</span><span class="hl opt">,</span> RV670_9506<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9507</span><span class="hl opt">,</span> RV670_9507<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9508</span><span class="hl opt">,</span> RV670_9508<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9509</span><span class="hl opt">,</span> RV670_9509<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x950F</span><span class="hl opt">,</span> RV670_950F<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9511</span><span class="hl opt">,</span> RV670_9511<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9515</span><span class="hl opt">,</span> RV670_9515<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9517</span><span class="hl opt">,</span> RV670_9517<span class="hl opt">,</span> RV670<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9519</span><span class="hl opt">,</span> RV670_9519<span class="hl opt">,</span> RV670<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95C0</span><span class="hl opt">,</span> RV620_95C0<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95C2</span><span class="hl opt">,</span> RV620_95C2<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95C4</span><span class="hl opt">,</span> RV620_95C4<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95C5</span><span class="hl opt">,</span> RV620_95C5<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95C6</span><span class="hl opt">,</span> RV620_95C6<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95C7</span><span class="hl opt">,</span> RV620_95C7<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95C9</span><span class="hl opt">,</span> RV620_95C9<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95CC</span><span class="hl opt">,</span> RV620_95CC<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95CD</span><span class="hl opt">,</span> RV620_95CD<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95CE</span><span class="hl opt">,</span> RV620_95CE<span class="hl opt">,</span> RV620<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x95CF</span><span class="hl opt">,</span> RV620_95CF<span class="hl opt">,</span> RV620<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9590</span><span class="hl opt">,</span> RV635_9590<span class="hl opt">,</span> RV635<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9591</span><span class="hl opt">,</span> RV635_9591<span class="hl opt">,</span> RV635<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9593</span><span class="hl opt">,</span> RV635_9593<span class="hl opt">,</span> RV635<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9595</span><span class="hl opt">,</span> RV635_9595<span class="hl opt">,</span> RV635<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9596</span><span class="hl opt">,</span> RV635_9596<span class="hl opt">,</span> RV635<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9597</span><span class="hl opt">,</span> RV635_9597<span class="hl opt">,</span> RV635<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9598</span><span class="hl opt">,</span> RV635_9598<span class="hl opt">,</span> RV635<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9599</span><span class="hl opt">,</span> RV635_9599<span class="hl opt">,</span> RV635<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x959B</span><span class="hl opt">,</span> RV635_959B<span class="hl opt">,</span> RV635<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9610</span><span class="hl opt">,</span> RS780_9610<span class="hl opt">,</span> RS780<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9611</span><span class="hl opt">,</span> RS780_9611<span class="hl opt">,</span> RS780<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9612</span><span class="hl opt">,</span> RS780_9612<span class="hl opt">,</span> RS780<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9613</span><span class="hl opt">,</span> RS780_9613<span class="hl opt">,</span> RS780<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9614</span><span class="hl opt">,</span> RS780_9614<span class="hl opt">,</span> RS780<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9615</span><span class="hl opt">,</span> RS780_9615<span class="hl opt">,</span> RS780<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9616</span><span class="hl opt">,</span> RS780_9616<span class="hl opt">,</span> RS780<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9710</span><span class="hl opt">,</span> RS880_9710<span class="hl opt">,</span> RS880<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9711</span><span class="hl opt">,</span> RS880_9711<span class="hl opt">,</span> RS880<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9712</span><span class="hl opt">,</span> RS880_9712<span class="hl opt">,</span> RS880<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9713</span><span class="hl opt">,</span> RS880_9713<span class="hl opt">,</span> RS880<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9714</span><span class="hl opt">,</span> RS880_9714<span class="hl opt">,</span> RS880<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9715</span><span class="hl opt">,</span> RS880_9715<span class="hl opt">,</span> RS880<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9440</span><span class="hl opt">,</span> RV770_9440<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9441</span><span class="hl opt">,</span> RV770_9441<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9442</span><span class="hl opt">,</span> RV770_9442<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9443</span><span class="hl opt">,</span> RV770_9443<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9444</span><span class="hl opt">,</span> RV770_9444<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9446</span><span class="hl opt">,</span> RV770_9446<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x944A</span><span class="hl opt">,</span> RV770_944A<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x944B</span><span class="hl opt">,</span> RV770_944B<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x944C</span><span class="hl opt">,</span> RV770_944C<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x944E</span><span class="hl opt">,</span> RV770_944E<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9450</span><span class="hl opt">,</span> RV770_9450<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9452</span><span class="hl opt">,</span> RV770_9452<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9456</span><span class="hl opt">,</span> RV770_9456<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x945A</span><span class="hl opt">,</span> RV770_945A<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x945B</span><span class="hl opt">,</span> RV770_945B<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x945E</span><span class="hl opt">,</span> RV770_945E<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9460</span><span class="hl opt">,</span> RV790_9460<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9462</span><span class="hl opt">,</span> RV790_9462<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x946A</span><span class="hl opt">,</span> RV770_946A<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x946B</span><span class="hl opt">,</span> RV770_946B<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x947A</span><span class="hl opt">,</span> RV770_947A<span class="hl opt">,</span> RV770<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x947B</span><span class="hl opt">,</span> RV770_947B<span class="hl opt">,</span> RV770<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9480</span><span class="hl opt">,</span> RV730_9480<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9487</span><span class="hl opt">,</span> RV730_9487<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9488</span><span class="hl opt">,</span> RV730_9488<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9489</span><span class="hl opt">,</span> RV730_9489<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x948A</span><span class="hl opt">,</span> RV730_948A<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x948F</span><span class="hl opt">,</span> RV730_948F<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9490</span><span class="hl opt">,</span> RV730_9490<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9491</span><span class="hl opt">,</span> RV730_9491<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9495</span><span class="hl opt">,</span> RV730_9495<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9498</span><span class="hl opt">,</span> RV730_9498<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x949C</span><span class="hl opt">,</span> RV730_949C<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x949E</span><span class="hl opt">,</span> RV730_949E<span class="hl opt">,</span> RV730<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x949F</span><span class="hl opt">,</span> RV730_949F<span class="hl opt">,</span> RV730<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9540</span><span class="hl opt">,</span> RV710_9540<span class="hl opt">,</span> RV710<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9541</span><span class="hl opt">,</span> RV710_9541<span class="hl opt">,</span> RV710<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9542</span><span class="hl opt">,</span> RV710_9542<span class="hl opt">,</span> RV710<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x954E</span><span class="hl opt">,</span> RV710_954E<span class="hl opt">,</span> RV710<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x954F</span><span class="hl opt">,</span> RV710_954F<span class="hl opt">,</span> RV710<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9552</span><span class="hl opt">,</span> RV710_9552<span class="hl opt">,</span> RV710<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9553</span><span class="hl opt">,</span> RV710_9553<span class="hl opt">,</span> RV710<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9555</span><span class="hl opt">,</span> RV710_9555<span class="hl opt">,</span> RV710<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9557</span><span class="hl opt">,</span> RV710_9557<span class="hl opt">,</span> RV710<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x955F</span><span class="hl opt">,</span> RV710_955F<span class="hl opt">,</span> RV710<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94A0</span><span class="hl opt">,</span> RV740_94A0<span class="hl opt">,</span> RV740<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94A1</span><span class="hl opt">,</span> RV740_94A1<span class="hl opt">,</span> RV740<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94A3</span><span class="hl opt">,</span> RV740_94A3<span class="hl opt">,</span> RV740<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94B1</span><span class="hl opt">,</span> RV740_94B1<span class="hl opt">,</span> RV740<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94B3</span><span class="hl opt">,</span> RV740_94B3<span class="hl opt">,</span> RV740<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94B4</span><span class="hl opt">,</span> RV740_94B4<span class="hl opt">,</span> RV740<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94B5</span><span class="hl opt">,</span> RV740_94B5<span class="hl opt">,</span> RV740<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x94B9</span><span class="hl opt">,</span> RV740_94B9<span class="hl opt">,</span> RV740<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68E0</span><span class="hl opt">,</span> CEDAR_68E0<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68E1</span><span class="hl opt">,</span> CEDAR_68E1<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68E4</span><span class="hl opt">,</span> CEDAR_68E4<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68E5</span><span class="hl opt">,</span> CEDAR_68E5<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68E8</span><span class="hl opt">,</span> CEDAR_68E8<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68E9</span><span class="hl opt">,</span> CEDAR_68E9<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68F1</span><span class="hl opt">,</span> CEDAR_68F1<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68F2</span><span class="hl opt">,</span> CEDAR_68F2<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68F8</span><span class="hl opt">,</span> CEDAR_68F8<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68F9</span><span class="hl opt">,</span> CEDAR_68F9<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68FA</span><span class="hl opt">,</span> CEDAR_68FA<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68FE</span><span class="hl opt">,</span> CEDAR_68FE<span class="hl opt">,</span> CEDAR<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68C0</span><span class="hl opt">,</span> REDWOOD_68C0<span class="hl opt">,</span> REDWOOD<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68C1</span><span class="hl opt">,</span> REDWOOD_68C1<span class="hl opt">,</span> REDWOOD<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68C8</span><span class="hl opt">,</span> REDWOOD_68C8<span class="hl opt">,</span> REDWOOD<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68C9</span><span class="hl opt">,</span> REDWOOD_68C9<span class="hl opt">,</span> REDWOOD<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68D8</span><span class="hl opt">,</span> REDWOOD_68D8<span class="hl opt">,</span> REDWOOD<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68D9</span><span class="hl opt">,</span> REDWOOD_68D9<span class="hl opt">,</span> REDWOOD<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68DA</span><span class="hl opt">,</span> REDWOOD_68DA<span class="hl opt">,</span> REDWOOD<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68DE</span><span class="hl opt">,</span> REDWOOD_68DE<span class="hl opt">,</span> REDWOOD<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68A0</span><span class="hl opt">,</span> JUNIPER_68A0<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68A1</span><span class="hl opt">,</span> JUNIPER_68A1<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68A8</span><span class="hl opt">,</span> JUNIPER_68A8<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68A9</span><span class="hl opt">,</span> JUNIPER_68A9<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68B0</span><span class="hl opt">,</span> JUNIPER_68B0<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68B8</span><span class="hl opt">,</span> JUNIPER_68B8<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68B9</span><span class="hl opt">,</span> JUNIPER_68B9<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68BA</span><span class="hl opt">,</span> JUNIPER_68BA<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68BE</span><span class="hl opt">,</span> JUNIPER_68BE<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x68BF</span><span class="hl opt">,</span> JUNIPER_68BF<span class="hl opt">,</span> JUNIPER<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x6880</span><span class="hl opt">,</span> CYPRESS_6880<span class="hl opt">,</span> CYPRESS<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x6888</span><span class="hl opt">,</span> CYPRESS_6888<span class="hl opt">,</span> CYPRESS<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x6889</span><span class="hl opt">,</span> CYPRESS_6889<span class="hl opt">,</span> CYPRESS<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x688A</span><span class="hl opt">,</span> CYPRESS_688A<span class="hl opt">,</span> CYPRESS<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x6898</span><span class="hl opt">,</span> CYPRESS_6898<span class="hl opt">,</span> CYPRESS<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x6899</span><span class="hl opt">,</span> CYPRESS_6899<span class="hl opt">,</span> CYPRESS<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x689B</span><span class="hl opt">,</span> CYPRESS_689B<span class="hl opt">,</span> CYPRESS<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x689E</span><span class="hl opt">,</span> CYPRESS_689E<span class="hl opt">,</span> CYPRESS<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x689C</span><span class="hl opt">,</span> HEMLOCK_689C<span class="hl opt">,</span> HEMLOCK<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x689D</span><span class="hl opt">,</span> HEMLOCK_689D<span class="hl opt">,</span> HEMLOCK<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9802</span><span class="hl opt">,</span> PALM_9802<span class="hl opt">,</span> PALM<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9803</span><span class="hl opt">,</span> PALM_9803<span class="hl opt">,</span> PALM<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9804</span><span class="hl opt">,</span> PALM_9804<span class="hl opt">,</span> PALM<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9805</span><span class="hl opt">,</span> PALM_9805<span class="hl opt">,</span> PALM<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9806</span><span class="hl opt">,</span> PALM_9806<span class="hl opt">,</span> PALM<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9807</span><span class="hl opt">,</span> PALM_9807<span class="hl opt">,</span> PALM<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9808</span><span class="hl opt">,</span> PALM_9808<span class="hl opt">,</span> PALM<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9809</span><span class="hl opt">,</span> PALM_9809<span class="hl opt">,</span> PALM<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x980A</span><span class="hl opt">,</span> PALM_980A<span class="hl opt">,</span> PALM<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9640</span><span class="hl opt">,</span> SUMO_9640<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9641</span><span class="hl opt">,</span> SUMO_9641<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9642</span><span class="hl opt">,</span> SUMO2_9642<span class="hl opt">,</span> SUMO2<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9643</span><span class="hl opt">,</span> SUMO2_9643<span class="hl opt">,</span> SUMO2<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9644</span><span class="hl opt">,</span> SUMO2_9644<span class="hl opt">,</span> SUMO2<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9645</span><span class="hl opt">,</span> SUMO2_9645<span class="hl opt">,</span> SUMO2<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9647</span><span class="hl opt">,</span> SUMO_9647<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9648</span><span class="hl opt">,</span> SUMO_9648<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x9649</span><span class="hl opt">,</span> SUMO_9649<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x964a</span><span class="hl opt">,</span> SUMO_964A<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x964b</span><span class="hl opt">,</span> SUMO_964B<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x964c</span><span class="hl opt">,</span> SUMO_964C<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x964e</span><span class="hl opt">,</span> SUMO_964E<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x964f</span><span class="hl opt">,</span> SUMO_964F<span class="hl opt">,</span>  SUMO<span class="hl opt">)</span>

<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x6700</span><span class="hl opt">,</span> CAYMAN_6700<span class="hl opt">,</span> CAYMAN<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x6701</span><span class="hl opt">,</span> CAYMAN_6701<span class="hl opt">,</span> CAYMAN<span class="hl opt">)</span>
<span class="hl kwd">CHIPSET</span><span class="hl opt">(</span><span class="hl num">0x6702</span><span class="hl opt">,</span> CAYMAN_6702<span class="hl opt">,</span> CAYMAN<span class="hl opt">)