/************************************************************************** * * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. * * **************************************************************************/ /* * Simple memory MANager interface that keeps track on allocate regions on a * per "owner" basis. All regions associated with an "owner" can be released * with a simple call. Typically if the "owner" exists. The owner is any * "unsigned long" identifier. Can typically be a pointer to a file private * struct or a context identifier. * * Authors: * Thomas Hellström */ #ifndef DRM_SMAN_H #define DRM_SMAN_H #include "drmP.h" #include "drm_hashtab.h" /* * A class that is an abstration of a simple memory allocator. * The sman implementation provides a default such allocator * using the drm_mm.c implementation. But the user can replace it. * See the SiS implementation, which may use the SiS FB kernel module * for memory management. */ struct drm_sman_mm { /* private info. If allocated, needs to be destroyed by the destroy function */ void *private; /* Allocate a memory block with given size and alignment. Return an opaque reference to the memory block */ void *(*allocate) (void *private, unsigned long size, unsigned alignment); /* Free a memory block. "ref" is the opaque reference that we got from the "alloc" function */ void (*free) (void *private, void *ref); /* Free all resources associated with this allocator */ void (*destroy) (void *private); /* Return a memory offset from the opaque reference returned from the "alloc" function */ unsigned long (*offset) (void *private, void *ref); }; struct drm_memblock_item { struct list_head owner_list; struct drm_hash_item user_hash; void *mm_info; struct drm_sman_mm *mm; struct drm_sman *sman; }; struct drm_sman { struct drm_sman_mm *mm; int num_managers; struct drm_open_hash owner_hash_tab; struct drm_open_hash user_hash_tab; struct list_head owner_items; }; /* * Take down a memory manager. This function should only be called after a * successful init and after a call to drm_sman_cleanup. */ extern void drm_sman_takedown(struct drm_sman * sman); /* * Allocate structures for a manager. * num_managers are the number of memory pools to manage. (VRAM, AGP, ....) * user_order is the log2 of the number of buckets in the user hash table. * set this to approximately log2 of the max number of memory regions * that will be allocated for _all_ pools together. * owner_order is the log2 of the number of buckets in the owner hash table. * set this to approximately log2 of * the number of client file connections that will * be using the manager. * */ extern int drm_sman_init(struct drm_sman * sman, unsigned int num_managers, unsigned int user_order, unsigned int owner_order); /* * Initialize a drm_mm.c allocator. Should be called only once for each * manager unless a customized allogator is used. */ extern int drm_sman_set_range(struct drm_sman * sman, unsigned int manager, unsigned long start, unsigned long size); /* * Initialize a customized allocator for one of the managers. * (See the SiS module). The object pointed to by "allocator" is copied, * so it can be destroyed after this call. */ extern int drm_sman_set_manager(struct drm_sman * sman, unsigned int mananger, struct drm_sman_mm * allocator); /* * Allocate a memory block. Aligment is not implemented yet. */ extern struct drm_memblock_item *drm_sman_alloc(struct drm_sman * sman, unsigned int manager, unsigned long size, unsigned alignment, unsigned long owner); /* * Free a memory block identified by its user hash key. */ extern int drm_sman_free_key(struct drm_sman * sman, unsigned int key); /* * returns 1 iff there are no stale memory blocks associated with this owner. * Typically called to determine if we need to idle the hardware and call * drm_sman_owner_cleanup. If there are no stale memory blocks, it removes all * resources associated with owner. */ extern int drm_sman_owner_clean(struct drm_sman * sman, unsigned long owner); /* * Frees all stale memory blocks associated with this owner. Note that this * requires that the hardware is finished with all blocks, so the graphics engine * should be idled before this call is made. This function also frees * any resources associated with "owner" and should be called when owner * is not going to be referenced anymore. */ extern void drm_sman_owner_cleanup(struct drm_sman * sman, unsigned long owner); /* * Frees all stale memory blocks associated with the memory manager. * See idling above. */ extern void drm_sman_cleanup(struct drm_sman * sman); #endif n96' href='#n96'>96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 
/*
 * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
 * Copyright 2005 Stephane Marchesin
 *
 * The Weather Channel (TM) funded Tungsten Graphics to develop the
 * initial release of the Radeon 8500 driver under the XFree86 license.
 * This notice must be preserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *    Keith Whitwell <keith@tungstengraphics.com>
 */


#include "drmP.h"
#include "drm.h"
#include "drm_sarea.h"
#include "nouveau_drv.h"

static struct mem_block *split_block(struct mem_block *p, uint64_t start, uint64_t size,
		DRMFILE filp)
{
	/* Maybe cut off the start of an existing block */
	if (start > p->start) {
		struct mem_block *newblock =
			drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
		if (!newblock)
			goto out;
		newblock->start = start;
		newblock->size = p->size - (start - p->start);
		newblock->filp = NULL;
		newblock->next = p->next;
		newblock->prev = p;
		p->next->prev = newblock;
		p->next = newblock;
		p->size -= newblock->size;
		p = newblock;
	}

	/* Maybe cut off the end of an existing block */
	if (size < p->size) {
		struct mem_block *newblock =
			drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
		if (!newblock)
			goto out;
		newblock->start = start + size;
		newblock->size = p->size - size;
		newblock->filp = NULL;
		newblock->next = p->next;
		newblock->prev = p;
		p->next->prev = newblock;
		p->next = newblock;
		p->size = size;
	}

out:
	/* Our block is in the middle */
	p->filp = filp;
	return p;
}

struct mem_block *nouveau_mem_alloc_block(struct mem_block *heap, uint64_t size,
					  int align2, DRMFILE filp)
{
	struct mem_block *p;
	uint64_t mask = (1 << align2) - 1;

	if (!heap)
		return NULL;

	list_for_each(p, heap) {
		uint64_t start = (p->start + mask) & ~mask;
		if (p->filp == 0 && start + size <= p->start + p->size)
			return split_block(p, start, size, filp);
	}

	return NULL;
}

static struct mem_block *find_block(struct mem_block *heap, uint64_t start)
{
	struct mem_block *p;

	list_for_each(p, heap)
		if (p->start == start)
			return p;

	return NULL;
}

void nouveau_mem_free_block(struct mem_block *p)
{
	p->filp = NULL;

	/* Assumes a single contiguous range.  Needs a special filp in
	 * 'heap' to stop it being subsumed.
	 */
	if (p->next->filp == 0) {
		struct mem_block *q = p->next;
		p->size += q->size;
		p->next = q->next;
		p->next->prev = p;
		drm_free(q, sizeof(*q), DRM_MEM_BUFS);
	}

	if (p->prev->filp == 0) {
		struct mem_block *q = p->prev;
		q->size += p->size;
		q->next = p->next;
		q->next->prev = q;
		drm_free(p, sizeof(*q), DRM_MEM_BUFS);
	}
}

/* Initialize.  How to check for an uninitialized heap?
 */
int nouveau_mem_init_heap(struct mem_block **heap, uint64_t start,
			  uint64_t size)
{
	struct mem_block *blocks = drm_alloc(sizeof(*blocks), DRM_MEM_BUFS);

	if (!blocks)
		return DRM_ERR(ENOMEM);

	*heap = drm_alloc(sizeof(**heap), DRM_MEM_BUFS);
	if (!*heap) {
		drm_free(blocks, sizeof(*blocks), DRM_MEM_BUFS);
		return DRM_ERR(ENOMEM);
	}

	blocks->start = start;
	blocks->size = size;
	blocks->filp = NULL;
	blocks->next = blocks->prev = *heap;

	memset(*heap, 0, sizeof(**heap));
	(*heap)->filp = (DRMFILE) - 1;
	(*heap)->next = (*heap)->prev = blocks;
	return 0;
}

/* 
 * Free all blocks associated with the releasing filp
 */
void nouveau_mem_release(DRMFILE filp, struct mem_block *heap)
{
	struct mem_block *p;

	if (!heap || !heap->next)
		return;

	list_for_each(p, heap) {
		if (p->filp == filp)
			p->filp = NULL;
	}

	/* Assumes a single contiguous range.  Needs a special filp in
	 * 'heap' to stop it being subsumed.
	 */
	list_for_each(p, heap) {
		while ((p->filp == 0) && (p->next->filp == 0) && (p->next!=heap)) {
			struct mem_block *q = p->next;
			p->size += q->size;
			p->next = q->next;
			p->next->prev = p;
			drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
		}
	}
}

/* 
 * Cleanup everything
 */
void nouveau_mem_takedown(struct mem_block **heap)
{
	struct mem_block *p;

	if (!*heap)
		return;

	for (p = (*heap)->next; p != *heap;) {
		struct mem_block *q = p;
		p = p->next;
		drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
	}

	drm_free(*heap, sizeof(**heap), DRM_MEM_DRIVER);
	*heap = NULL;
}

void nouveau_mem_close(struct drm_device *dev)
{
	drm_nouveau_private_t *dev_priv = dev->dev_private;
	nouveau_mem_takedown(&dev_priv->agp_heap);
	nouveau_mem_takedown(&dev_priv->fb_heap);
}

/* returns the amount of FB ram in bytes */
uint64_t nouveau_mem_fb_amount(struct drm_device *dev)
{
	drm_nouveau_private_t *dev_priv=dev->dev_private;
	switch(dev_priv->card_type)
	{
		case NV_03:
			switch(NV_READ(NV03_BOOT_0)&NV03_BOOT_0_RAM_AMOUNT)
			{
				case NV03_BOOT_0_RAM_AMOUNT_8MB:
				case NV03_BOOT_0_RAM_AMOUNT_8MB_SDRAM:
					return 8*1024*1024;
				case NV03_BOOT_0_RAM_AMOUNT_4MB:
					return 4*1024*1024;
				case NV03_BOOT_0_RAM_AMOUNT_2MB:
					return 2*1024*1024;
			}
			break;
		case NV_04:
		case NV_05:
			if (NV_READ(NV03_BOOT_0) & 0x00000100) {
				return (((NV_READ(NV03_BOOT_0) >> 12) & 0xf)*2+2)*1024*1024;
			} else
			switch(NV_READ(NV03_BOOT_0)&NV03_BOOT_0_RAM_AMOUNT)
			{
				case NV04_BOOT_0_RAM_AMOUNT_32MB:
					return 32*1024*1024;
				case NV04_BOOT_0_RAM_AMOUNT_16MB:
					return 16*1024*1024;
				case NV04_BOOT_0_RAM_AMOUNT_8MB:
					return 8*1024*1024;
				case NV04_BOOT_0_RAM_AMOUNT_4MB:
					return 4*1024*1024;
			}
			break;
		case NV_10:
		case NV_17:
		case NV_20:
		case NV_30:
		case NV_40:
		case NV_44:
		case NV_50:
		default:
			// XXX won't work on BSD because of pci_read_config_dword
			if (dev_priv->flags&NV_NFORCE) {
				uint32_t mem;
				pci_read_config_dword(dev->pdev, 0x7C, &mem);
				return (uint64_t)(((mem >> 6) & 31) + 1)*1024*1024;
			} else if(dev_priv->flags&NV_NFORCE2) {
				uint32_t mem;
				pci_read_config_dword(dev->pdev, 0x84, &mem);
				return (uint64_t)(((mem >> 4) & 127) + 1)*1024*1024;
			} else {
				uint64_t mem;
				mem=(NV_READ(NV04_FIFO_DATA)&NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK) >> NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT;
				return mem*1024*1024;
			}
			break;
	}

	DRM_ERROR("Unable to detect video ram size. Please report your setup to " DRIVER_EMAIL "\n");
	return 0;
}



int nouveau_mem_init(struct drm_device *dev)
{
	drm_nouveau_private_t *dev_priv = dev->dev_private;
	uint32_t fb_size;
	dev_priv->agp_phys=0;
	dev_priv->fb_phys=0;

	/* init AGP */
	dev_priv->agp_heap=NULL;
	if (drm_device_is_agp(dev))
	{
		int err;
		drm_agp_info_t info;
		drm_agp_mode_t mode;
		drm_agp_buffer_t agp_req;
		drm_agp_binding_t bind_req;

		err = drm_agp_acquire(dev);
		if (err) {
			DRM_ERROR("Unable to acquire AGP: %d\n", err);
			goto no_agp;
		}

		err = drm_agp_info(dev, &info);
		if (err) {
			DRM_ERROR("Unable to get AGP info: %d\n", err);
			goto no_agp;
		}

		/* see agp.h for the AGPSTAT_* modes available */
		mode.mode = info.mode;
		err = drm_agp_enable(dev, mode);
		if (err) {
			DRM_ERROR("Unable to enable AGP: %d\n", err);
			goto no_agp;
		}

		agp_req.size = info.aperture_size;
		agp_req.type = 0;
		err = drm_agp_alloc(dev, &agp_req);
		if (err) {
			DRM_ERROR("Unable to alloc AGP: %d\n", err);
			goto no_agp;
		}

		bind_req.handle = agp_req.handle;
		bind_req.offset = 0;
		err = drm_agp_bind(dev, &bind_req);
		if (err) {
			DRM_ERROR("Unable to bind AGP: %d\n", err);
			goto no_agp;
		}

		if (nouveau_mem_init_heap(&dev_priv->agp_heap,
					  info.aperture_base,
					  info.aperture_size))
			goto no_agp;

		dev_priv->agp_phys		= info.aperture_base;
		dev_priv->agp_available_size	= info.aperture_size;
	}
no_agp:

	/* setup a mtrr over the FB */
	dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1),
					 nouveau_mem_fb_amount(dev),
					 DRM_MTRR_WC);

	/* Init FB */
	dev_priv->fb_phys=drm_get_resource_start(dev,1);
	fb_size = nouveau_mem_fb_amount(dev);
	/* On at least NV40, RAMIN is actually at the end of vram.
	 * We don't want to allocate this... */
	if (dev_priv->card_type >= NV_40)
		fb_size -= dev_priv->ramin_size;
	dev_priv->fb_available_size = fb_size;
	DRM_DEBUG("Available VRAM: %dKiB\n", fb_size>>10);

	if (fb_size>256*1024*1024) {
		/* On cards with > 256Mb, you can't map everything. 
		 * So we create a second FB heap for that type of memory */
		if (nouveau_mem_init_heap(&dev_priv->fb_heap,
					  drm_get_resource_start(dev,1),
					  256*1024*1024))
			return DRM_ERR(ENOMEM);
		if (nouveau_mem_init_heap(&dev_priv->fb_nomap_heap,
					  drm_get_resource_start(dev,1) + 
					  256*1024*1024,
					  fb_size-256*1024*1024))
			return DRM_ERR(ENOMEM);
	} else {
		if (nouveau_mem_init_heap(&dev_priv->fb_heap,
					  drm_get_resource_start(dev,1),
					  fb_size))
			return DRM_ERR(ENOMEM);
		dev_priv->fb_nomap_heap=NULL;
	}

	return 0;
}

struct mem_block* nouveau_mem_alloc(struct drm_device *dev, int alignment, uint64_t size, int flags, DRMFILE filp)
{
	struct mem_block *block;
	int type;
	drm_nouveau_private_t *dev_priv = dev->dev_private;

	/* 
	 * Make things easier on ourselves: all allocations are page-aligned. 
	 * We need that to map allocated regions into the user space
	 */
	if (alignment < PAGE_SHIFT)
		alignment = PAGE_SHIFT;

	/*
	 * Warn about 0 sized allocations, but let it go through. It'll return 1 page
	 */
	if (size == 0)
		DRM_INFO("warning : 0 byte allocation\n");

	/*
	 * Keep alloc size a multiple of the page size to keep drm_addmap() happy
	 */
	if (size & (~PAGE_MASK))
		size = ((size/PAGE_SIZE) + 1) * PAGE_SIZE;

	if (flags&NOUVEAU_MEM_AGP) {
		type=NOUVEAU_MEM_AGP;
		block = nouveau_mem_alloc_block(dev_priv->agp_heap, size,
						alignment, filp);
		if (block) goto alloc_ok;
	}
	if (flags&(NOUVEAU_MEM_FB|NOUVEAU_MEM_FB_ACCEPTABLE)) {
		type=NOUVEAU_MEM_FB;
		if (!(flags&NOUVEAU_MEM_MAPPED)) {
			block = nouveau_mem_alloc_block(dev_priv->fb_nomap_heap,
							size, alignment, filp);
			if (block) goto alloc_ok;
		}
		block = nouveau_mem_alloc_block(dev_priv->fb_heap, size,
						alignment, filp);
		if (block) goto alloc_ok;	
	}
	if (flags&NOUVEAU_MEM_AGP_ACCEPTABLE) {
		type=NOUVEAU_MEM_AGP;
		block = nouveau_mem_alloc_block(dev_priv->agp_heap, size,
						alignment, filp);
		if (block) goto alloc_ok;
	}

	return NULL;

alloc_ok:
	block->flags=type;

	if (flags&NOUVEAU_MEM_MAPPED)
	{
		int ret;
		block->flags|=NOUVEAU_MEM_MAPPED;

		if (type == NOUVEAU_MEM_AGP)
			ret = drm_addmap(dev, block->start - dev->agp->base, block->size, 
					_DRM_AGP, 0, &block->map);
		else
			ret = drm_addmap(dev, block->start, block->size,
					_DRM_FRAME_BUFFER, 0, &block->map);
		if (ret) { 
			nouveau_mem_free_block(block);
			return NULL;
		}
	}

	DRM_INFO("allocated 0x%llx\n", block->start);
	return block;
}

void nouveau_mem_free(struct drm_device* dev, struct mem_block* block)
{
	DRM_INFO("freeing 0x%llx\n", block->start);
	if (block->flags&NOUVEAU_MEM_MAPPED)
		drm_rmmap(dev, block->map);
	nouveau_mem_free_block(block);
}

static void
nouveau_instmem_determine_amount(struct drm_device *dev)
{
	drm_nouveau_private_t *dev_priv = dev->dev_private;
	int i;

	/* Figure out how much instance memory we need */
	switch (dev_priv->card_type) {
	case NV_40:
		/* We'll want more instance memory than this on some NV4x cards.
		 * There's a 16MB aperture to play with that maps onto the end
		 * of vram.  For now, only reserve a small piece until we know
		 * more about what each chipset requires.
		 */
		dev_priv->ramin_size = (1*1024* 1024);
		break;
	default:
		/*XXX: what *are* the limits on <NV40 cards?, and does RAMIN
		 *     exist in vram on those cards as well?
		 */
		dev_priv->ramin_size = (512*1024);
		break;
	}
	DRM_DEBUG("RAMIN size: %dKiB\n", dev_priv->ramin_size>>10);

	/* Clear all of it, except the BIOS image that's in the first 64KiB */
	for (i=(64*1024); i<dev_priv->ramin_size; i+=4)
		NV_WI32(i, 0x00000000);
}

static void
nouveau_instmem_configure_fixed_tables(struct drm_device *dev)
{
	drm_nouveau_private_t *dev_priv = dev->dev_private;

	/* FIFO hash table (RAMHT)
	 *   use 4k hash table at RAMIN+0x10000
	 *   TODO: extend the hash table
	 */
	dev_priv->ramht_offset = 0x10000;
	dev_priv->ramht_bits   = 9;
	dev_priv->ramht_size   = (1 << dev_priv->ramht_bits);
	DRM_DEBUG("RAMHT offset=0x%x, size=%d\n", dev_priv->ramht_offset,
						  dev_priv->ramht_size);

	/* FIFO runout table (RAMRO) - 512k at 0x11200 */
	dev_priv->ramro_offset = 0x11200;
	dev_priv->ramro_size   = 512;
	DRM_DEBUG("RAMRO offset=0x%x, size=%d\n", dev_priv->ramro_offset,
						  dev_priv->ramro_size);

	/* FIFO context table (RAMFC)
	 *   NV40  : Not sure exactly how to position RAMFC on some cards,
	 *           0x30002 seems to position it at RAMIN+0x20000 on these
	 *           cards.  RAMFC is 4kb (32 fifos, 128byte entries).
	 *   Others: Position RAMFC at RAMIN+0x11400
	 */
	switch(dev_priv->card_type)
	{
		case NV_50:
		case NV_40:
		case NV_44:
			dev_priv->ramfc_offset = 0x20000;
			dev_priv->ramfc_size   = nouveau_fifo_number(dev) *
				nouveau_fifo_ctx_size(dev);
			break;
		case NV_30:
		case NV_20:
		case NV_17:
		case NV_10:
		case NV_04:
		case NV_03:
		default:
			dev_priv->ramfc_offset = 0x11400;
			dev_priv->ramfc_size   = nouveau_fifo_number(dev) *
				nouveau_fifo_ctx_size(dev);
			break;
	}
	DRM_DEBUG("RAMFC offset=0x%x, size=%d\n", dev_priv->ramfc_offset,
						  dev_priv->ramfc_size);
}

int nouveau_instmem_init(struct drm_device *dev)
{
	drm_nouveau_private_t *dev_priv = dev->dev_private;
	uint32_t offset;
	int ret = 0;

	nouveau_instmem_determine_amount(dev);
	nouveau_instmem_configure_fixed_tables(dev);

	if ((ret = nouveau_gpuobj_new_fake(dev, dev_priv->ramht_offset,
						dev_priv->ramht_size,
						NVOBJ_FLAG_ZERO_ALLOC |
						NVOBJ_FLAG_ALLOW_NO_REFS,
						&dev_priv->ramht, NULL)))
		return ret;

	/* Create a heap to manage RAMIN allocations, we don't allocate
	 * the space that was reserved for RAMHT/FC/RO.
	 */
	offset = dev_priv->ramfc_offset + dev_priv->ramfc_size;
	ret = nouveau_mem_init_heap(&dev_priv->ramin_heap,
				    offset, dev_priv->ramin_size - offset);
	if (ret) {
		dev_priv->ramin_heap = NULL;
		DRM_ERROR("Failed to init RAMIN heap\n");
	}

	return ret;
}

struct mem_block *nouveau_instmem_alloc(struct drm_device *dev,
					uint32_t size, uint32_t align)
{
	drm_nouveau_private_t *dev_priv = dev->dev_private;
	struct mem_block *block;

	if (!dev_priv->ramin_heap) {
		DRM_ERROR("instmem alloc called without init\n");
		return NULL;
	}

	block = nouveau_mem_alloc_block(dev_priv->ramin_heap, size, align,
					(DRMFILE)-2);
	if (block) {
		block->flags = NOUVEAU_MEM_INSTANCE;
		DRM_DEBUG("instance(size=%d, align=%d) alloc'd at 0x%08x\n",
				size, (1<<align), (uint32_t)block->start);
	}

	return block;
}

void nouveau_instmem_free(struct drm_device *dev, struct mem_block *block)
{
	if (dev && block) {
		nouveau_mem_free_block(block);
	}
}

/*
 * Ioctls
 */

int nouveau_ioctl_mem_alloc(DRM_IOCTL_ARGS)
{
	DRM_DEVICE;
	drm_nouveau_private_t *dev_priv = dev->dev_private;
	drm_nouveau_mem_alloc_t alloc;
	struct mem_block *block;

	if (!dev_priv) {
		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
		return DRM_ERR(EINVAL);
	}

	DRM_COPY_FROM_USER_IOCTL(alloc, (drm_nouveau_mem_alloc_t __user *) data,
				 sizeof(alloc));

	block=nouveau_mem_alloc(dev, alloc.alignment, alloc.size, alloc.flags, filp);
	if (!block)
		return DRM_ERR(ENOMEM);
	alloc.region_offset=block->start;
	alloc.flags=block->flags;

	DRM_COPY_TO_USER_IOCTL((drm_nouveau_mem_alloc_t __user *) data, alloc, sizeof(alloc));

	return 0;
}

int nouveau_ioctl_mem_free(DRM_IOCTL_ARGS)
{
	DRM_DEVICE;
	drm_nouveau_private_t *dev_priv = dev->dev_private;
	drm_nouveau_mem_free_t memfree;
	struct mem_block *block;

	DRM_COPY_FROM_USER_IOCTL(memfree, (drm_nouveau_mem_free_t __user *) data,
				 sizeof(memfree));

	block=NULL;
	if (memfree.flags&NOUVEAU_MEM_FB)
		block = find_block(dev_priv->fb_heap, memfree.region_offset);
	else if (memfree.flags&NOUVEAU_MEM_AGP)
		block = find_block(dev_priv->agp_heap, memfree.region_offset);
	if (!block)
		return DRM_ERR(EFAULT);
	if (block->filp != filp)
		return DRM_ERR(EPERM);

	nouveau_mem_free(dev, block);
	return 0;
}
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-02 01:32:10 +0000