# # Makefile for the drm device driver. This driver provides support for the # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. # # Based on David Woodhouse's mtd build. # # $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel,v 1.18 2003/08/16 17:59:17 dawes Exp $ # drm-objs := drm_auth.o drm_bufs.o drm_context.o drm_dma.o drm_drawable.o \ drm_drv.o drm_fops.o drm_ioctl.o drm_irq.o \ drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \ drm_sysfs.o drm_pci.o drm_agpsupport.o drm_scatter.o \ drm_memory_debug.o ati_pcigart.o drm_sman.o \ drm_hashtab.o drm_mm.o drm_object.o drm_compat.o \ drm_fence.o drm_ttm.o drm_bo.o drm_bo_move.o drm_bo_lock.o \ drm_regman.o tdfx-objs := tdfx_drv.o r128-objs := r128_drv.o r128_cce.o r128_state.o r128_irq.o mga-objs := mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o i810-objs := i810_drv.o i810_dma.o i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_fence.o \ i915_buffer.o i915_compat.o nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \ nouveau_object.o nouveau_irq.o nouveau_notifier.o nouveau_swmthd.o \ nouveau_sgdma.o nouveau_dma.o nouveau_buffer.o nouveau_fence.o \ nv04_timer.o \ nv04_mc.o nv40_mc.o nv50_mc.o \ nv04_fb.o nv10_fb.o nv40_fb.o \ nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \ nv04_graph.o nv10_graph.o nv20_graph.o \ nv40_graph.o nv50_graph.o \ nv04_instmem.o nv50_instmem.o radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o sis-objs := sis_drv.o sis_mm.o ffb-objs := ffb_drv.o ffb_context.o savage-objs := savage_drv.o savage_bci.o savage_state.o via-objs := via_irq.o via_drv.o via_map.o via_mm.o via_dma.o via_verifier.o \ via_video.o via_dmablit.o via_fence.o via_buffer.o mach64-objs := mach64_drv.o mach64_dma.o mach64_irq.o mach64_state.o nv-objs := nv_drv.o xgi-objs := xgi_cmdlist.o xgi_drv.o xgi_fb.o xgi_misc.o xgi_pcie.o \ xgi_fence.o ifeq ($(CONFIG_COMPAT),y) drm-objs += drm_ioc32.o radeon-objs += radeon_ioc32.o mga-objs += mga_ioc32.o r128-objs += r128_ioc32.o i915-objs += i915_ioc32.o nouveau-objs += nouveau_ioc32.o xgi-objs += xgi_ioc32.o endif obj-m += drm.o obj-$(CONFIG_DRM_TDFX) += tdfx.o obj-$(CONFIG_DRM_R128) += r128.o obj-$(CONFIG_DRM_RADEON)+= radeon.o obj-$(CONFIG_DRM_MGA) += mga.o obj-$(CONFIG_DRM_I810) += i810.o obj-$(CONFIG_DRM_I915) += i915.o obj-$(CONFIG_DRM_SIS) += sis.o obj-$(CONFIG_DRM_FFB) += ffb.o obj-$(CONFIG_DRM_SAVAGE)+= savage.o obj-$(CONFIG_DRM_VIA) += via.o obj-$(CONFIG_DRM_MACH64)+= mach64.o obj-$(CONFIG_DRM_NV) += nv.o obj-$(CONFIG_DRM_NOUVEAU) += nouveau.o obj-$(CONFIG_DRM_XGI) += xgi.o able summary='blob content' class='blob'> 
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/*
 * Copyright (C) 2008 Maarten Maathuis.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#include "nv50_fb.h"
#include "nv50_lut.h"
#include "nv50_crtc.h"
#include "nv50_display.h"

static int nv50_fb_bind(struct nv50_crtc *crtc, struct nv50_fb_info *info)
{
	int rval = 0;

	NV50_DEBUG("\n");

	if (!crtc || !info) {
		DRM_ERROR("crtc %p info %p\n",crtc, info);
		return -EINVAL;
	}

	if (!info->block || !info->width || !info->height || !info->depth || !info->bpp || !info->pitch) {
		DRM_ERROR("block %p width %d height %d depth %d bpp %d pitch %d\n", info->block, info->width, 
			info->height, info->depth, info->bpp, info->pitch);
		return -EINVAL;
	}

	crtc->fb->block = info->block;
	crtc->fb->width = info->width;
	crtc->fb->height = info->height;

	crtc->fb->y = info->x;
	crtc->fb->x = info->y;

	crtc->fb->depth = info->depth;
	crtc->fb->bpp = info->bpp;

	crtc->fb->pitch = info->pitch;

	/* update lut if needed */
	if (crtc->fb->depth != crtc->lut->depth) {
		int r_size = 0, g_size = 0, b_size = 0;
		uint16_t *r_val, *g_val, *b_val;
		int i;

		switch (crtc->fb->depth) {
			case 15:
				r_size = 32;
				g_size = 32;
				b_size = 32;
				break;
			case 16:
				r_size = 32;
				g_size = 64;
				b_size = 32;
				break;
			case 24:
			default:
				r_size = 256;
				g_size = 256;
				b_size = 256;
				break;
		}

		r_val = kmalloc(r_size * sizeof(uint16_t), GFP_KERNEL);
		g_val = kmalloc(g_size * sizeof(uint16_t), GFP_KERNEL);
		b_val = kmalloc(b_size * sizeof(uint16_t), GFP_KERNEL);

		if (!r_val || !g_val || !b_val)
			return -ENOMEM;

		/* Set the color indices. */
		for (i = 0; i < r_size; i++) {
			r_val[i] = i << 8;
		}
		for (i = 0; i < g_size; i++) {
			g_val[i] = i << 8;
		}
		for (i = 0; i < b_size; i++) {
			b_val[i] = i << 8;
		}

		rval = crtc->lut->set(crtc, r_val, g_val, b_val);

		/* free before returning */
		kfree(r_val);
		kfree(g_val);
		kfree(b_val);

		if (rval != 0)
			return rval;
	}

	return 0;
}

int nv50_fb_create(struct nv50_crtc *crtc)
{
	if (!crtc)
		return -EINVAL;

	crtc->fb = kzalloc(sizeof(struct nv50_fb), GFP_KERNEL);

	if (!crtc->fb)
		return -ENOMEM;

	crtc->fb->bind = nv50_fb_bind;

	return 0;
}

int nv50_fb_destroy(struct nv50_crtc *crtc)
{
	if (!crtc)
		return -EINVAL;

	kfree(crtc->fb);