From d81bc78a04f3b72bdf2600158cea084223a3a682 Mon Sep 17 00:00:00 2001 From: Pekka Paalanen Date: Thu, 25 Oct 2007 22:34:45 +0300 Subject: nouveau: more nv20_graph_init. This patch is originally from malc0_, but since it used some NV40_* regs, I edited them into hex values with a comment. This seems to correspond quite well with my own mmio-trace, for the parts I cared to check. --- shared-core/nv20_graph.c | 44 +++++++++++++++++++++++++++++++++----------- 1 file changed, 33 insertions(+), 11 deletions(-) (limited to 'shared-core/nv20_graph.c') diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index e6ccf672..3d9549a4 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -667,10 +667,16 @@ int nv20_graph_save_context(struct nouveau_channel *chan) static void nv20_graph_rdi(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - int i; + int i, writecount = 32; + uint32_t rdi_index = 0x2c80000; + + if (dev_priv->chipset == 0x20) { + rdi_index = 0x3d0000; + writecount = 15; + } - NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x2c80000); - for (i = 0; i < 32; i++) + NV_WRITE(NV10_PGRAPH_RDI_INDEX, rdi_index); + for (i = 0; i < writecount; i++) NV_WRITE(NV10_PGRAPH_RDI_DATA, 0); nouveau_wait_for_idle(dev); @@ -706,7 +712,7 @@ int nv20_graph_init(struct drm_device *dev) { NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000); NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x00118700); - NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xF20E0435); /* 0x4 = auto ctx switch */ + NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xF3CE0475); /* 0x4 = auto ctx switch */ NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00000000); NV_WRITE(0x40009C , 0x00000040); @@ -718,9 +724,9 @@ int nv20_graph_init(struct drm_device *dev) { NV_WRITE(0x400098, 0x40000080); NV_WRITE(0x400B88, 0x000000ff); } else { - NV_WRITE(0x400880, 0x00080000); + NV_WRITE(0x400880, 0x00080000); /* 0x0008c7df */ NV_WRITE(0x400094, 0x00000005); - NV_WRITE(0x400B80, 0x45CAA208); + NV_WRITE(0x400B80, 0x45CAA208); /* 0x45eae20e */ NV_WRITE(0x400B84, 0x24000000); NV_WRITE(0x400098, 0x00000040); NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00E00038); @@ -730,12 +736,28 @@ int nv20_graph_init(struct drm_device *dev) { } /* copy tile info from PFB */ - for (i=0; i Date: Mon, 5 Nov 2007 12:42:22 +1000 Subject: drm: remove lots of spurious whitespace. Kernel "cleanfile" script run. --- shared-core/nv20_graph.c | 1 - 1 file changed, 1 deletion(-) (limited to 'shared-core/nv20_graph.c') diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index 3d9549a4..a21fde71 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -887,4 +887,3 @@ int nv30_graph_init(struct drm_device *dev) return 0; } - -- cgit v1.2.3 From 448ccf13ba647a4b649857c661ab9c64bce91795 Mon Sep 17 00:00:00 2001 From: Stephane Marchesin Date: Wed, 14 Nov 2007 02:52:55 +0100 Subject: nouveau: adjust the size of the NV34 context. That fixes mobile PPC cards. --- shared-core/nv20_graph.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'shared-core/nv20_graph.c') diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index a21fde71..797983f6 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -29,7 +29,7 @@ #define NV2A_GRCTX_SIZE (3500*4) #define NV30_31_GRCTX_SIZE (24392) -#define NV34_GRCTX_SIZE (18140) +#define NV34_GRCTX_SIZE (22000) #define NV35_36_GRCTX_SIZE (22396) static void nv20_graph_context_init(struct drm_device *dev, -- cgit v1.2.3 From 46235ea4595152d8dd5f016c18c6845a77db30b0 Mon Sep 17 00:00:00 2001 From: Patrice Mandin Date: Wed, 14 Nov 2007 23:31:59 +0100 Subject: nouveau: nv30: missing ramin init, does it brake other hw? --- shared-core/nv20_graph.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'shared-core/nv20_graph.c') diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index 797983f6..dace7edb 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -432,6 +432,19 @@ static void nv30_31_graph_context_init(struct drm_device *dev, INSTANCE_WR(ctx, 0x385c/4, 0x3f800000); INSTANCE_WR(ctx, 0x3864/4, 0xbf800000); INSTANCE_WR(ctx, 0x386c/4, 0xbf800000); + + /* nv30gl stuff */ + for (i=0; i<8; i++) { + INSTANCE_WR(ctx, (0x4dfc/4)+i, 0x001c527d); + } + INSTANCE_WR(ctx, 0x4e3c/4, 0x001c527c); +/* these ones make dma fifo hang + INSTANCE_WR(ctx, 0x567c/4, 0x000a0000); + INSTANCE_WR(ctx, 0x0878/4, 0x01000000); + INSTANCE_WR(ctx, 0x02f4/4, 0x0001ffff); + + INSTANCE_WR(ctx, 0x0028/4, INSTANCE_RD(ctx, 0x0028/4) | 1); +*/ } static void nv34_graph_context_init(struct drm_device *dev, -- cgit v1.2.3 From 9b2a95bc6c9ddbf481d5f6017d9e85ed4def095d Mon Sep 17 00:00:00 2001 From: Stephane Marchesin Date: Thu, 15 Nov 2007 18:01:26 +0100 Subject: nouveau: revert the nv34 context size change, it was not the culprit after all. --- shared-core/nv20_graph.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'shared-core/nv20_graph.c') diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index dace7edb..81501ed7 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -29,7 +29,7 @@ #define NV2A_GRCTX_SIZE (3500*4) #define NV30_31_GRCTX_SIZE (24392) -#define NV34_GRCTX_SIZE (22000) +#define NV34_GRCTX_SIZE (18140) #define NV35_36_GRCTX_SIZE (22396) static void nv20_graph_context_init(struct drm_device *dev, -- cgit v1.2.3 From 449a3b19ff6e5bd054e7da3086e2d16604fae7ed Mon Sep 17 00:00:00 2001 From: Patrice Mandin Date: Sat, 15 Dec 2007 10:23:30 +0100 Subject: Revert "nouveau: nv30: missing ramin init, does it brake other hw?" This reverts commit 46235ea4595152d8dd5f016c18c6845a77db30b0. --- shared-core/nv20_graph.c | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'shared-core/nv20_graph.c') diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index 81501ed7..a21fde71 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -432,19 +432,6 @@ static void nv30_31_graph_context_init(struct drm_device *dev, INSTANCE_WR(ctx, 0x385c/4, 0x3f800000); INSTANCE_WR(ctx, 0x3864/4, 0xbf800000); INSTANCE_WR(ctx, 0x386c/4, 0xbf800000); - - /* nv30gl stuff */ - for (i=0; i<8; i++) { - INSTANCE_WR(ctx, (0x4dfc/4)+i, 0x001c527d); - } - INSTANCE_WR(ctx, 0x4e3c/4, 0x001c527c); -/* these ones make dma fifo hang - INSTANCE_WR(ctx, 0x567c/4, 0x000a0000); - INSTANCE_WR(ctx, 0x0878/4, 0x01000000); - INSTANCE_WR(ctx, 0x02f4/4, 0x0001ffff); - - INSTANCE_WR(ctx, 0x0028/4, INSTANCE_RD(ctx, 0x0028/4) | 1); -*/ } static void nv34_graph_context_init(struct drm_device *dev, -- cgit v1.2.3 From 381724a35b662302b70f9a5c04f1412ff2c2ad5b Mon Sep 17 00:00:00 2001 From: Stuart Bennett Date: Thu, 27 Dec 2007 01:10:52 +0000 Subject: [PATCH] nouveau: Fix nv20/30 context loading Don't set the context as valid until it has been loaded --- shared-core/nv20_graph.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'shared-core/nv20_graph.c') diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index a21fde71..37a147b5 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -642,6 +642,7 @@ int nv20_graph_load_context(struct nouveau_channel *chan) NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst); NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_XFER, NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD); + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100); nouveau_wait_for_idle(dev); return 0; @@ -759,7 +760,7 @@ int nv20_graph_init(struct drm_device *dev) { NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA000C); NV_WRITE(NV10_PGRAPH_RDI_DATA, NV_READ(0x100324)); - NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100); + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10000100); NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001); @@ -854,7 +855,7 @@ int nv30_graph_init(struct drm_device *dev) NV_WRITE(NV10_PGRAPH_TSTATUS(i), NV_READ(NV10_PFB_TSTATUS(i))); } - NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100); + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10000100); NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001); -- cgit v1.2.3