From 7f6bf84c238a1859ffd409c0ef1f1ca7eb5e6e72 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 5 Nov 2007 12:42:22 +1000 Subject: drm: remove lots of spurious whitespace. Kernel "cleanfile" script run. --- shared-core/nv04_fifo.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'shared-core/nv04_fifo.c') diff --git a/shared-core/nv04_fifo.c b/shared-core/nv04_fifo.c index d750ced8..d172302c 100644 --- a/shared-core/nv04_fifo.c +++ b/shared-core/nv04_fifo.c @@ -71,7 +71,7 @@ nv04_fifo_destroy_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; - + NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<id)); nouveau_gpuobj_ref_del(dev, &chan->ramfc); @@ -88,11 +88,11 @@ nv04_fifo_load_context(struct nouveau_channel *chan) NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET, RAMFC_RD(DMA_GET)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT, RAMFC_RD(DMA_PUT)); - + tmp = RAMFC_RD(DMA_INSTANCE); NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE, tmp & 0xFFFF); NV_WRITE(NV04_PFIFO_CACHE1_DMA_DCOUNT, tmp >> 16); - + NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE, RAMFC_RD(DMA_STATE)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_FETCH, RAMFC_RD(DMA_FETCH)); NV_WRITE(NV04_PFIFO_CACHE1_ENGINE, RAMFC_RD(ENGINE)); @@ -123,7 +123,6 @@ nv04_fifo_save_context(struct nouveau_channel *chan) RAMFC_WR(DMA_FETCH, NV_READ(NV04_PFIFO_CACHE1_DMA_FETCH)); RAMFC_WR(ENGINE, NV_READ(NV04_PFIFO_CACHE1_ENGINE)); RAMFC_WR(PULL1_ENGINE, NV_READ(NV04_PFIFO_CACHE1_PULL1)); - + return 0; } - -- cgit v1.2.3 From d0904f0f2b87c725d3e67060419c445259bd4a5e Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 14 Nov 2007 03:27:37 +1100 Subject: nouveau: funcs to determine active channel on PFIFO. --- shared-core/nv04_fifo.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'shared-core/nv04_fifo.c') diff --git a/shared-core/nv04_fifo.c b/shared-core/nv04_fifo.c index d172302c..230c8e72 100644 --- a/shared-core/nv04_fifo.c +++ b/shared-core/nv04_fifo.c @@ -35,6 +35,15 @@ #define NV04_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV04_RAMFC__SIZE)) #define NV04_RAMFC__SIZE 32 +int +nv04_fifo_channel_id(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + return (NV_READ(NV03_PFIFO_CACHE1_PUSH1) & + NV03_PFIFO_CACHE1_PUSH1_CHID_MASK); +} + int nv04_fifo_create_context(struct nouveau_channel *chan) { @@ -84,7 +93,8 @@ nv04_fifo_load_context(struct nouveau_channel *chan) struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp; - NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, (1<<8) | chan->id); + NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, + NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id); NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET, RAMFC_RD(DMA_GET)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT, RAMFC_RD(DMA_PUT)); -- cgit v1.2.3