From d2373b2a341868882208bb4297ab4f2f51302031 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 6 May 2008 13:28:26 -0700
Subject: GEM: Use irq-based fencing rather than syncing and evicting every
 exec.

---
 shared-core/i915_irq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 785008d4..b17e2408 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -545,7 +545,7 @@ void i915_user_irq_off(drm_i915_private_t *dev_priv)
 }
 
 
-static int i915_wait_irq(struct drm_device * dev, int irq_nr)
+int i915_wait_irq(struct drm_device * dev, int irq_nr)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	int ret = 0;
-- 
cgit v1.2.3


From 5e662f90d1143de53db866e2b8a94f1bfbe5fc51 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Wed, 14 May 2008 15:13:14 -0700
Subject: [gem] Release GEM buffers from work task scheduled from IRQ.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

There are now 3 lists.  Active is buffers currently in the ringbuffer.
Flushing is not in the ringbuffer, but needs a flush before unbinding.
Inactive is as before.  This prevents object_free → unbind →
wait_rendering → object_reference and a kernel oops about weird refcounting.

This also avoids an synchronous extra flush and wait when freeing a buffer
which had a write_domain set (such as a temporary rendered to and then from
using the 2d engine).  It will sit around on the flushing list until the
appropriate flush gets emitted, or we need the GTT space for another
operation.
---
 shared-core/i915_irq.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index b17e2408..02191316 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -436,6 +436,28 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
 	return count;
 }
 
+/**
+ * Handler for user interrupts in process context (able to sleep, do VFS
+ * operations, etc.
+ *
+ * If another IRQ comes in while we're in this handler, it will still get put
+ * on the queue again to be rerun when we finish.
+ */
+void
+i915_user_interrupt_handler(struct work_struct *work)
+{
+	drm_i915_private_t *dev_priv;
+	struct drm_device *dev;
+
+	dev_priv = container_of(work, drm_i915_private_t,
+				user_interrupt_task);
+	dev = dev_priv->dev;
+
+	mutex_lock(&dev->struct_mutex);
+	i915_gem_retire_requests(dev);
+	mutex_unlock(&dev->struct_mutex);
+}
+
 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 {
 	struct drm_device *dev = (struct drm_device *) arg;
@@ -493,6 +515,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 		DRM_WAKEUP(&dev_priv->irq_queue);
 #ifdef I915_HAVE_FENCE
 		i915_fence_handler(dev);
+		schedule_work(&dev_priv->user_interrupt_task);
 #endif
 	}
 
-- 
cgit v1.2.3


From d434b64f6a760d85295e32298a9a1f3624ee1b69 Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Mon, 26 May 2008 03:25:16 -0700
Subject: [i915] leave interrupts masked off when not in use.

The interrupt enable register cannot be used to temporarily disable
interrupts, instead use the interrupt mask register.

Note that this change means that a pile of buffers will be left stuck on the
chip as the final interrupts will not be recognized to come and drain things.
---
 shared-core/i915_irq.c | 74 ++++++++++++++++++++++++++++++++++----------------
 1 file changed, 50 insertions(+), 24 deletions(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 02191316..fbfc5f46 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -508,7 +508,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 	if (dev_priv->sarea_priv)
 	    dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 
-	I915_WRITE(I915REG_INT_IDENTITY_R, iir);
+	I915_WRITE(I915REG_INT_IDENTITY_R, iir | I915_USER_INTERRUPT);
 	(void) I915_READ(I915REG_INT_IDENTITY_R); /* Flush posted write */
 
 	if (iir & I915_USER_INTERRUPT) {
@@ -550,8 +550,9 @@ void i915_user_irq_on(drm_i915_private_t *dev_priv)
 {
 	DRM_SPINLOCK(&dev_priv->user_irq_lock);
 	if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
-		dev_priv->irq_enable_reg |= I915_USER_INTERRUPT;
-		I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
+		dev_priv->irq_mask_reg &= ~I915_USER_INTERRUPT;
+		I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+		(void) I915_READ (I915REG_INT_ENABLE_R);
 	}
 	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 
@@ -560,9 +561,11 @@ void i915_user_irq_on(drm_i915_private_t *dev_priv)
 void i915_user_irq_off(drm_i915_private_t *dev_priv)
 {
 	DRM_SPINLOCK(&dev_priv->user_irq_lock);
+	BUG_ON(dev_priv->user_irq_refcount <= 0);
 	if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
-		//		dev_priv->irq_enable_reg &= ~USER_INT_FLAG;
-		//		I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
+		dev_priv->irq_mask_reg |= I915_USER_INTERRUPT;
+		I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+		(void) I915_READ(I915REG_INT_MASK_R);
 	}
 	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 }
@@ -642,16 +645,17 @@ int i915_enable_vblank(struct drm_device *dev, int plane)
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	int pipe = i915_get_pipe(dev, plane);
 	u32	pipestat_reg = 0;
+	u32	mask_reg = 0;
 	u32	pipestat;
 
 	switch (pipe) {
 	case 0:
 		pipestat_reg = I915REG_PIPEASTAT;
-		dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
+		mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 		break;
 	case 1:
 		pipestat_reg = I915REG_PIPEBSTAT;
-		dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
+		mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
 		break;
 	default:
 		DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
@@ -677,7 +681,11 @@ int i915_enable_vblank(struct drm_device *dev, int plane)
 			     I915_VBLANK_INTERRUPT_STATUS);
 		I915_WRITE(pipestat_reg, pipestat);
 	}
-	I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
+	DRM_SPINLOCK(&dev_priv->user_irq_lock);
+	dev_priv->irq_mask_reg &= ~mask_reg;
+	I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+	I915_READ(I915REG_INT_MASK_R);
+	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 
 	return 0;
 }
@@ -687,16 +695,17 @@ void i915_disable_vblank(struct drm_device *dev, int plane)
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	int pipe = i915_get_pipe(dev, plane);
 	u32	pipestat_reg = 0;
+	u32	mask_reg = 0;
 	u32	pipestat;
 
 	switch (pipe) {
 	case 0:
 		pipestat_reg = I915REG_PIPEASTAT;
-		dev_priv->irq_enable_reg &= ~I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
+		mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
 		break;
 	case 1:
 		pipestat_reg = I915REG_PIPEBSTAT;
-		dev_priv->irq_enable_reg &= ~I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
+		mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
 		break;
 	default:
 		DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
@@ -704,7 +713,11 @@ void i915_disable_vblank(struct drm_device *dev, int plane)
 		break;
 	}
 
-	I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
+	DRM_SPINLOCK(&dev_priv->user_irq_lock);
+	dev_priv->irq_mask_reg |= mask_reg;
+	I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+	(void) I915_READ (I915REG_INT_MASK_R);
+	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 	if (pipestat_reg)
 	{
 		pipestat = I915_READ (pipestat_reg);
@@ -716,6 +729,7 @@ void i915_disable_vblank(struct drm_device *dev, int plane)
 		pipestat |= (I915_START_VBLANK_INTERRUPT_STATUS |
 			     I915_VBLANK_INTERRUPT_STATUS);
 		I915_WRITE(pipestat_reg, pipestat);
+		(void) I915_READ(pipestat_reg);
 	}
 }
 
@@ -723,12 +737,27 @@ static void i915_enable_interrupt (struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	
-	dev_priv->irq_enable_reg |= I915_USER_INTERRUPT;
-
-	I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg);
+	dev_priv->irq_mask_reg = (I915_USER_INTERRUPT |
+				  I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
+				  I915_DISPLAY_PIPE_B_EVENT_INTERRUPT);
+	I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+	I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_mask_reg);
+	(void) I915_READ (I915REG_INT_ENABLE_R);
 	dev_priv->irq_enabled = 1;
 }
 
+static void i915_disable_interrupt (struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+	
+	I915_WRITE(I915REG_HWSTAM, 0xffffffff);
+	I915_WRITE(I915REG_INT_MASK_R, 0xffffffff);
+	I915_WRITE(I915REG_INT_ENABLE_R, 0);
+	I915_WRITE(I915REG_INT_IDENTITY_R, 0xffffffff);
+	(void) I915_READ (I915REG_INT_IDENTITY_R);
+	dev_priv->irq_enabled = 0;
+}
+
 /* Set the vblank monitor pipe
  */
 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
@@ -934,9 +963,11 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 
-	I915_WRITE16(I915REG_HWSTAM, 0xeffe);
-	I915_WRITE16(I915REG_INT_MASK_R, 0x0);
-	I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
+	I915_WRITE(I915REG_HWSTAM, 0xffff);
+	I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
+	I915_WRITE(I915REG_INT_MASK_R, 0xffffffff);
+	I915_WRITE(I915REG_INT_IDENTITY_R, 0xffffffff);
+	(void) I915_READ(I915REG_INT_IDENTITY_R);
 }
 
 int i915_driver_irq_postinstall(struct drm_device * dev)
@@ -950,7 +981,7 @@ int i915_driver_irq_postinstall(struct drm_device * dev)
 
 	DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
 	dev_priv->user_irq_refcount = 0;
-	dev_priv->irq_enable_reg = 0;
+	dev_priv->irq_mask_reg = 0;
 
 	ret = drm_vblank_init(dev, num_pipes);
 	if (ret)
@@ -977,15 +1008,10 @@ void i915_driver_irq_uninstall(struct drm_device * dev)
 	if (!dev_priv)
 		return;
 
-	dev_priv->irq_enabled = 0;
-	I915_WRITE(I915REG_HWSTAM, 0xffffffff);
-	I915_WRITE(I915REG_INT_MASK_R, 0xffffffff);
-	I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
+	i915_disable_interrupt (dev);
 
 	temp = I915_READ(I915REG_PIPEASTAT);
 	I915_WRITE(I915REG_PIPEASTAT, temp);
 	temp = I915_READ(I915REG_PIPEBSTAT);
 	I915_WRITE(I915REG_PIPEBSTAT, temp);
-	temp = I915_READ(I915REG_INT_IDENTITY_R);
-	I915_WRITE(I915REG_INT_IDENTITY_R, temp);
 }
-- 
cgit v1.2.3


From 2150da5d1a57d25d0f4bc39bb6c883d410f586d1 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 10 Jun 2008 15:30:23 -0700
Subject: [gem] Manage the ringbuffer from the kernel in the GEM case.

This requires that the X Server use the execbuf interface for buffer
submission, as it no longer has direct access to the ring.  This is
therefore a flag day for the gem interface.

This also adds enter/leavevt ioctls for use by the X Server.  These would
get stubbed out in a modesetting implementation, but are required while
in an environment where the device's state is only managed by the DRM while
X has the VT.
---
 shared-core/i915_irq.c | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 37d85f40..077af1ab 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -575,6 +575,11 @@ int i915_wait_irq(struct drm_device * dev, int irq_nr)
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	int ret = 0;
 
+	if (!dev_priv) {
+		DRM_ERROR("called with no initialization\n");
+		return -EINVAL;
+	}
+
 	DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
 		  READ_BREADCRUMB(dev_priv));
 
-- 
cgit v1.2.3


From 62a3be962f1915d17813ecbfc9544232908b44e4 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 10 Jun 2008 23:10:33 -0700
Subject: [intel] Fix BUG_ON trigger in irq masking if you did on/off with irqs
 disabled.

---
 shared-core/i915_irq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 077af1ab..0125f8b3 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -560,7 +560,7 @@ void i915_user_irq_on(drm_i915_private_t *dev_priv)
 void i915_user_irq_off(drm_i915_private_t *dev_priv)
 {
 	DRM_SPINLOCK(&dev_priv->user_irq_lock);
-	BUG_ON(dev_priv->user_irq_refcount <= 0);
+	BUG_ON(dev_priv->irq_enabled && dev_priv->user_irq_refcount <= 0);
 	if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
 		dev_priv->irq_mask_reg |= I915_USER_INTERRUPT;
 		I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
-- 
cgit v1.2.3


From cc74ac359053e95fd79d7011a2e18defcefb5c19 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 12 Jun 2008 10:56:37 -0700
Subject: Don't clear USER_INTERRUPT if we're not handling it.

This fixes a regression from commit d434b64f6a760d85295e32298a9a1f3624ee1b69
which could cause us to fail to wake up for user interrupts if we lost a race.
---
 shared-core/i915_irq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 0125f8b3..39da8143 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -507,7 +507,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 	if (dev_priv->sarea_priv)
 	    dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 
-	I915_WRITE(I915REG_INT_IDENTITY_R, iir | I915_USER_INTERRUPT);
+	I915_WRITE(I915REG_INT_IDENTITY_R, iir);
 	(void) I915_READ(I915REG_INT_IDENTITY_R); /* Flush posted write */
 
 	if (iir & I915_USER_INTERRUPT) {
-- 
cgit v1.2.3


From 0558d99c01c38e24e97b57ef55f66bb94a92e157 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 13 Jun 2008 09:53:36 -0700
Subject: [gem] Remove the interrupt handler for retiring requests.

This was insufficient once we started masking interrupts to only when someone
was waiting for them (and would thus retire requests themselves).  It was
replaced by the retire_timer.
---
 shared-core/i915_irq.c | 23 -----------------------
 1 file changed, 23 deletions(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 39da8143..6daf2918 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -435,28 +435,6 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
 	return count;
 }
 
-/**
- * Handler for user interrupts in process context (able to sleep, do VFS
- * operations, etc.
- *
- * If another IRQ comes in while we're in this handler, it will still get put
- * on the queue again to be rerun when we finish.
- */
-void
-i915_user_interrupt_handler(struct work_struct *work)
-{
-	drm_i915_private_t *dev_priv;
-	struct drm_device *dev;
-
-	dev_priv = container_of(work, drm_i915_private_t,
-				user_interrupt_task);
-	dev = dev_priv->dev;
-
-	mutex_lock(&dev->struct_mutex);
-	i915_gem_retire_requests(dev);
-	mutex_unlock(&dev->struct_mutex);
-}
-
 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 {
 	struct drm_device *dev = (struct drm_device *) arg;
@@ -514,7 +492,6 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 		DRM_WAKEUP(&dev_priv->irq_queue);
 #ifdef I915_HAVE_FENCE
 		i915_fence_handler(dev);
-		schedule_work(&dev_priv->user_interrupt_task);
 #endif
 	}
 
-- 
cgit v1.2.3


From df4ef348c8a48cead807a42fcd315f7e422aa156 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 13 Jun 2008 10:47:33 -0700
Subject: Fix i915_wait_irq in the presence of interrupt masking.

In the short-circuit code for the breadcrumb already being new enough, we
need to update the sarea_priv copy of the breadcrumb just as if we had
waited.  Otherwise userland error checking will notice that we returned
too early based on its wrong information, and call wait_irq again (leading
to spinning until someone else comes along and updates the sarea_priv).

This bug was hidden when we had interrupt masking disabled, such as in
master, since the interrupt handler would update sarea_priv.
---
 shared-core/i915_irq.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 6daf2918..cfa9320e 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -560,8 +560,12 @@ int i915_wait_irq(struct drm_device * dev, int irq_nr)
 	DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
 		  READ_BREADCRUMB(dev_priv));
 
-	if (READ_BREADCRUMB(dev_priv) >= irq_nr)
+	if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
+		if (dev_priv->sarea_priv)
+			dev_priv->sarea_priv->last_dispatch =
+				READ_BREADCRUMB(dev_priv);
 		return 0;
+	}
 
 	i915_user_irq_on(dev_priv);
 	DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
-- 
cgit v1.2.3


From 5957470ca3be6c0225985f74b1511401e02c014b Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Tue, 10 Jun 2008 18:19:19 -0700
Subject: [intel] Restructure irq to pend all work until after iir write.

The interrupt identity register must be writen before any work occurs lest
we drop an interrupt on the floor. This patch just shuffles code around to
make sure that IIR is written as early as possible.
---
 shared-core/i915_irq.c | 46 ++++++++++++++++++++++++----------------------
 1 file changed, 24 insertions(+), 22 deletions(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index cfa9320e..58781a4a 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -440,7 +440,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 	struct drm_device *dev = (struct drm_device *) arg;
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	u32 iir;
-	u32 pipea_stats, pipeb_stats;
+	u32 pipea_stats = 0, pipeb_stats = 0;
 	int vblank = 0;
 
 	iir = I915_READ(I915REG_INT_IDENTITY_R);
@@ -463,31 +463,19 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 	 */
 	if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) {
 		pipea_stats = I915_READ(I915REG_PIPEASTAT);
-		if (pipea_stats & (I915_START_VBLANK_INTERRUPT_STATUS|
-				   I915_VBLANK_INTERRUPT_STATUS))
-		{
-			vblank++;
-			drm_handle_vblank(dev, i915_get_plane(dev, 0));
-		}
 		I915_WRITE(I915REG_PIPEASTAT, pipea_stats);
 	}
 	if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) {
 		pipeb_stats = I915_READ(I915REG_PIPEBSTAT);
-		if (pipeb_stats & (I915_START_VBLANK_INTERRUPT_STATUS|
-				   I915_VBLANK_INTERRUPT_STATUS))
-		{
-			vblank++;
-			drm_handle_vblank(dev, i915_get_plane(dev, 1));
-		}
 		I915_WRITE(I915REG_PIPEBSTAT, pipeb_stats);
 	}
 
+	I915_WRITE(I915REG_INT_IDENTITY_R, iir);
+	(void) I915_READ(I915REG_INT_IDENTITY_R); /* Flush posted writes */
+
 	if (dev_priv->sarea_priv)
 	    dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 
-	I915_WRITE(I915REG_INT_IDENTITY_R, iir);
-	(void) I915_READ(I915REG_INT_IDENTITY_R); /* Flush posted write */
-
 	if (iir & I915_USER_INTERRUPT) {
 		DRM_WAKEUP(&dev_priv->irq_queue);
 #ifdef I915_HAVE_FENCE
@@ -495,6 +483,16 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 #endif
 	}
 
+	if (pipea_stats & (I915_START_VBLANK_INTERRUPT_STATUS|
+			   I915_VBLANK_INTERRUPT_STATUS)) {
+		vblank = 1;
+		drm_handle_vblank(dev, i915_get_plane(dev, 0));
+	}
+	if (pipeb_stats & (I915_START_VBLANK_INTERRUPT_STATUS|
+			   I915_VBLANK_INTERRUPT_STATUS)) {
+		vblank = 1;
+		drm_handle_vblank(dev, i915_get_plane(dev, 1));
+	}
 	if (vblank) {
 		if (dev_priv->swaps_pending > 0)
 			drm_locked_tasklet(dev, i915_vblank_tasklet);
@@ -526,9 +524,11 @@ void i915_user_irq_on(drm_i915_private_t *dev_priv)
 {
 	DRM_SPINLOCK(&dev_priv->user_irq_lock);
 	if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
-		dev_priv->irq_mask_reg &= ~I915_USER_INTERRUPT;
-		I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
-		(void) I915_READ (I915REG_INT_ENABLE_R);
+		if ((dev_priv->irq_mask_reg & I915_USER_INTERRUPT) != 0) {
+			dev_priv->irq_mask_reg &= ~I915_USER_INTERRUPT;
+			I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+			(void) I915_READ (I915REG_INT_MASK_R);
+		}
 	}
 	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 
@@ -539,9 +539,11 @@ void i915_user_irq_off(drm_i915_private_t *dev_priv)
 	DRM_SPINLOCK(&dev_priv->user_irq_lock);
 	BUG_ON(dev_priv->irq_enabled && dev_priv->user_irq_refcount <= 0);
 	if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
-		dev_priv->irq_mask_reg |= I915_USER_INTERRUPT;
-		I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
-		(void) I915_READ(I915REG_INT_MASK_R);
+		if ((dev_priv->irq_mask_reg & I915_USER_INTERRUPT) == 0) {
+			dev_priv->irq_mask_reg |= I915_USER_INTERRUPT;
+			I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+			(void) I915_READ(I915REG_INT_MASK_R);
+		}
 	}
 	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 }
-- 
cgit v1.2.3


From 3762c9ea6754763694b1de4df3acd9dc37247f87 Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Fri, 13 Jun 2008 10:27:39 -0700
Subject: [intel] Enable MSI for i915 IRQ

---
 shared-core/i915_irq.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 58781a4a..9ba5b00a 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -33,6 +33,13 @@
 
 #define MAX_NOPID ((u32)~0)
 
+/*
+ * These are the interrupts used by the driver
+ */
+#define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \
+				    I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \
+				    I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
+
 /**
  * i915_get_pipe - return the the pipe associated with a given plane
  * @dev: DRM device
@@ -443,6 +450,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 	u32 pipea_stats = 0, pipeb_stats = 0;
 	int vblank = 0;
 
+	if (dev->pdev->msi_enabled)
+		I915_WRITE(I915REG_INT_ENABLE_R, 0);
 	iir = I915_READ(I915REG_INT_IDENTITY_R);
 #if 0
 	DRM_DEBUG("flag=%08x\n", iir);
@@ -454,6 +463,9 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 			   I915_READ(I915REG_INT_ENABLE_R),
 			   I915_READ(I915REG_PIPEASTAT),
 			   I915_READ(I915REG_PIPEBSTAT));
+		if (dev->pdev->msi_enabled)
+			I915_WRITE(I915REG_INT_ENABLE_R,
+				   I915_INTERRUPT_ENABLE_MASK);
 		return IRQ_NONE;
 	}
 
@@ -498,6 +510,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 			drm_locked_tasklet(dev, i915_vblank_tasklet);
 	}
 
+	if (dev->pdev->msi_enabled)
+		I915_WRITE(I915REG_INT_ENABLE_R, I915_INTERRUPT_ENABLE_MASK);
 	return IRQ_HANDLED;
 }
 
@@ -724,11 +738,9 @@ static void i915_enable_interrupt (struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	
-	dev_priv->irq_mask_reg = (I915_USER_INTERRUPT |
-				  I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
-				  I915_DISPLAY_PIPE_B_EVENT_INTERRUPT);
+	dev_priv->irq_mask_reg = I915_INTERRUPT_ENABLE_MASK;
 	I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
-	I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_mask_reg);
+	I915_WRITE(I915REG_INT_ENABLE_R, I915_INTERRUPT_ENABLE_MASK);
 	(void) I915_READ (I915REG_INT_ENABLE_R);
 	dev_priv->irq_enabled = 1;
 }
-- 
cgit v1.2.3


From 71b1623e22c54d42837840a1d0479127a5049caf Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Fri, 20 Jun 2008 21:07:46 -0700
Subject: [intel-gem] Add intel-specific /proc entries to help monitor gem
 operation

This adds gem_active, gem_flushing, gem_inactive, gem_request and gem_seqno
entries to monitor gem operation and help debug issues.
---
 shared-core/i915_irq.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 9ba5b00a..767181c2 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -489,6 +489,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 	    dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 
 	if (iir & I915_USER_INTERRUPT) {
+		dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev);
 		DRM_WAKEUP(&dev_priv->irq_queue);
 #ifdef I915_HAVE_FENCE
 		i915_fence_handler(dev);
-- 
cgit v1.2.3


From 33114e4a1167ac79cb53043e77c16cc7fe40a640 Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Sat, 21 Jun 2008 00:12:21 -0700
Subject: [intel] Count received interrupts

Another patch adds this to a /proc/dri file for debugging and monitoring.
---
 shared-core/i915_irq.c | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 767181c2..c0abcbdd 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -456,6 +456,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 #if 0
 	DRM_DEBUG("flag=%08x\n", iir);
 #endif
+	atomic_inc(&dev_priv->irq_received);
 	if (iir == 0) {
 		DRM_DEBUG ("iir 0x%08x im 0x%08x ie 0x%08x pipea 0x%08x pipeb 0x%08x\n",
 			   iir,
@@ -963,6 +964,7 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 
+	atomic_set(&dev_priv->irq_received, 0);
 	I915_WRITE(I915REG_HWSTAM, 0xffff);
 	I915_WRITE(I915REG_INT_ENABLE_R, 0x0);
 	I915_WRITE(I915REG_INT_MASK_R, 0xffffffff);
-- 
cgit v1.2.3


From a369bf0e575697308690f532576caf652e42b4cb Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Sat, 21 Jun 2008 00:33:07 -0700
Subject: [intel] Use IMR instead of IER to pend interrupts during ISR

Noting that the interrupt mask register was more reliable than the interrupt
enable register for managing interrupts in user_irq_on/user_irq_off, this
patch replaces the remaining IER frobbing with IMR instead.

The test which exposes IER related failures is:

$ glxgears & glxgears & glxgears
(reposition the glxgears windows away from the upper left corner)
$ while :; do x11perf -rect100 -reps 800 -repeat 1; sleep 1; done &
$ while :; do runoa; runet; done &
---
 shared-core/i915_irq.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index c0abcbdd..a55497a8 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -451,7 +451,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 	int vblank = 0;
 
 	if (dev->pdev->msi_enabled)
-		I915_WRITE(I915REG_INT_ENABLE_R, 0);
+		I915_WRITE(I915REG_INT_MASK_R, ~0);
 	iir = I915_READ(I915REG_INT_IDENTITY_R);
 #if 0
 	DRM_DEBUG("flag=%08x\n", iir);
@@ -464,9 +464,11 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 			   I915_READ(I915REG_INT_ENABLE_R),
 			   I915_READ(I915REG_PIPEASTAT),
 			   I915_READ(I915REG_PIPEBSTAT));
-		if (dev->pdev->msi_enabled)
-			I915_WRITE(I915REG_INT_ENABLE_R,
-				   I915_INTERRUPT_ENABLE_MASK);
+		if (dev->pdev->msi_enabled) {
+			I915_WRITE(I915REG_INT_MASK_R,
+				   dev_priv->irq_mask_reg);
+			(void) I915_READ(I915REG_INT_MASK_R);
+		}
 		return IRQ_NONE;
 	}
 
@@ -484,6 +486,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 	}
 
 	I915_WRITE(I915REG_INT_IDENTITY_R, iir);
+	if (dev->pdev->msi_enabled)
+		I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
 	(void) I915_READ(I915REG_INT_IDENTITY_R); /* Flush posted writes */
 
 	if (dev_priv->sarea_priv)
@@ -512,8 +516,6 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 			drm_locked_tasklet(dev, i915_vblank_tasklet);
 	}
 
-	if (dev->pdev->msi_enabled)
-		I915_WRITE(I915REG_INT_ENABLE_R, I915_INTERRUPT_ENABLE_MASK);
 	return IRQ_HANDLED;
 }
 
@@ -543,6 +545,7 @@ void i915_user_irq_on(drm_i915_private_t *dev_priv)
 		if ((dev_priv->irq_mask_reg & I915_USER_INTERRUPT) != 0) {
 			dev_priv->irq_mask_reg &= ~I915_USER_INTERRUPT;
 			I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+			I915_WRITE(I915REG_INT_IDENTITY_R, I915_USER_INTERRUPT);
 			(void) I915_READ (I915REG_INT_MASK_R);
 		}
 	}
@@ -740,7 +743,7 @@ static void i915_enable_interrupt (struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	
-	dev_priv->irq_mask_reg = I915_INTERRUPT_ENABLE_MASK;
+	dev_priv->irq_mask_reg = ~0;
 	I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
 	I915_WRITE(I915REG_INT_ENABLE_R, I915_INTERRUPT_ENABLE_MASK);
 	(void) I915_READ (I915REG_INT_ENABLE_R);
-- 
cgit v1.2.3


From e36da6a133328a4cf9c98d9347c87dc3c3a12d16 Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Tue, 24 Jun 2008 13:08:04 -0700
Subject: [intel] Create functions to enable/disable interrupts

This shares common code sequences for managing the interrupt register bits
---
 shared-core/i915_irq.c | 48 ++++++++++++++++++++++++++----------------------
 1 file changed, 26 insertions(+), 22 deletions(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index a55497a8..710b2896 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -40,6 +40,26 @@
 				    I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \
 				    I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
 
+static inline void
+i915_enable_irq(drm_i915_private_t *dev_priv, uint32_t mask)
+{
+	if ((dev_priv->irq_mask_reg & mask) != 0) {
+		dev_priv->irq_mask_reg &= ~mask;
+		I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+		(void) I915_READ(I915REG_INT_MASK_R);
+	}
+}
+
+static inline void
+i915_disable_irq(drm_i915_private_t *dev_priv, uint32_t mask)
+{
+	if ((dev_priv->irq_mask_reg & mask) != mask) {
+		dev_priv->irq_mask_reg |= mask;
+		I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
+		(void) I915_READ(I915REG_INT_MASK_R);
+	}
+}
+
 /**
  * i915_get_pipe - return the the pipe associated with a given plane
  * @dev: DRM device
@@ -541,29 +561,17 @@ int i915_emit_irq(struct drm_device *dev)
 void i915_user_irq_on(drm_i915_private_t *dev_priv)
 {
 	DRM_SPINLOCK(&dev_priv->user_irq_lock);
-	if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){
-		if ((dev_priv->irq_mask_reg & I915_USER_INTERRUPT) != 0) {
-			dev_priv->irq_mask_reg &= ~I915_USER_INTERRUPT;
-			I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
-			I915_WRITE(I915REG_INT_IDENTITY_R, I915_USER_INTERRUPT);
-			(void) I915_READ (I915REG_INT_MASK_R);
-		}
-	}
+	if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1))
+		i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
 	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
-
 }
 
 void i915_user_irq_off(drm_i915_private_t *dev_priv)
 {
 	DRM_SPINLOCK(&dev_priv->user_irq_lock);
 	BUG_ON(dev_priv->irq_enabled && dev_priv->user_irq_refcount <= 0);
-	if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
-		if ((dev_priv->irq_mask_reg & I915_USER_INTERRUPT) == 0) {
-			dev_priv->irq_mask_reg |= I915_USER_INTERRUPT;
-			I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
-			(void) I915_READ(I915REG_INT_MASK_R);
-		}
-	}
+	if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0))
+		i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
 	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 }
 
@@ -688,9 +696,7 @@ int i915_enable_vblank(struct drm_device *dev, int plane)
 		I915_WRITE(pipestat_reg, pipestat);
 	}
 	DRM_SPINLOCK(&dev_priv->user_irq_lock);
-	dev_priv->irq_mask_reg &= ~mask_reg;
-	I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
-	I915_READ(I915REG_INT_MASK_R);
+	i915_enable_irq(dev_priv, mask_reg);
 	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 
 	return 0;
@@ -720,9 +726,7 @@ void i915_disable_vblank(struct drm_device *dev, int plane)
 	}
 
 	DRM_SPINLOCK(&dev_priv->user_irq_lock);
-	dev_priv->irq_mask_reg |= mask_reg;
-	I915_WRITE(I915REG_INT_MASK_R, dev_priv->irq_mask_reg);
-	(void) I915_READ (I915REG_INT_MASK_R);
+	i915_disable_irq(dev_priv, mask_reg);
 	DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
 	if (pipestat_reg)
 	{
-- 
cgit v1.2.3


From d250a55fc6a726a8bfaf4f871eeb09c895a9ba51 Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Tue, 24 Jun 2008 13:39:25 -0700
Subject: [intel] Get vblank pipe from irq_mask_reg instead of hardware enable
 reg

With the interrupt enable/disable using only the mask register, it was wrong
to use the enable register to detect which pipes had vblank detection
turned on. Also, as we keep a local copy of the mask register around, and
MSI machines smack the hardware during the interrupt handler, it is more
efficient and more correct to use the local copy.
---
 shared-core/i915_irq.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'shared-core/i915_irq.c')

diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 710b2896..f09ae5f7 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -794,14 +794,15 @@ int i915_vblank_pipe_get(struct drm_device *dev, void *data,
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	drm_i915_vblank_pipe_t *pipe = data;
-	u16 flag;
+	u32 flag = 0;
 
 	if (!dev_priv) {
 		DRM_ERROR("called with no initialization\n");
 		return -EINVAL;
 	}
 
-	flag = I915_READ(I915REG_INT_ENABLE_R);
+	if (dev_priv->irq_enabled)
+	    flag = ~dev_priv->irq_mask_reg;
 	pipe->pipe = 0;
 	if (flag & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)
 		pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
-- 
cgit v1.2.3