From 50dec29c800a6e980a01be38190e44a0ba7916b5 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 30 Oct 2007 17:51:59 +1000 Subject: drm/i915: add driver cache flush entry point Use clflush on Intel hardware to flush cached objects. --- linux-core/i915_buffer.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'linux-core/i915_buffer.c') diff --git a/linux-core/i915_buffer.c b/linux-core/i915_buffer.c index f81def8f..bbc7e1db 100644 --- a/linux-core/i915_buffer.c +++ b/linux-core/i915_buffer.c @@ -249,3 +249,36 @@ int i915_move(struct drm_buffer_object * bo, } return 0; } + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) +static inline void clflush(volatile void *__p) +{ + asm volatile("clflush %0" : "+m" (*(char __force *)__p)); +} +#endif + +static inline void drm_cache_flush_addr(void *virt) +{ + int i; + + for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size) + clflush(virt+i); +} + +static inline void drm_cache_flush_page(struct page *p) +{ + drm_cache_flush_addr(page_address(p)); +} + +void i915_flush_ttm(struct drm_ttm *ttm) +{ + int i; + + if (!ttm) + return; + + DRM_MEMORYBARRIER(); + for (i = ttm->num_pages-1; i >= 0; i--) + drm_cache_flush_page(drm_ttm_get_page(ttm, i)); + DRM_MEMORYBARRIER(); +} -- cgit v1.2.3