/*
* Copyright © 2009-2011 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include <assert.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdbool.h>
#include <stdarg.h>
#include <string.h>
#include "intel_chipset.h"
#include "intel_bufmgr.h"
/* Struct for tracking drm_intel_decode state. */
struct drm_intel_decode {
/** stdio file where the output should land. Defaults to stdout. */
FILE *out;
/** PCI device ID. */
uint32_t devid;
/**
* Shorthand device identifier: 3 is 915, 4 is 965, 5 is
* Ironlake, etc.
*/
int gen;
/** GPU address of the start of the current packet. */
uint32_t hw_offset;
/** CPU virtual address of the start of the current packet. */
uint32_t *data;
/** DWORDs of remaining batchbuffer data starting from the packet. */
uint32_t count;
/** GPU address of the start of the batchbuffer data. */
uint32_t base_hw_offset;
/** CPU Virtual address of the start of the batchbuffer data. */
uint32_t *base_data;
/** Number of DWORDs of batchbuffer data. */
uint32_t base_count;
/** @{
* GPU head and tail pointers, which will be noted in the dump, or ~0.
*/
uint32_t head, tail;
/** @} */
/**
* Whether to dump the dwords after MI_BATCHBUFFER_END.
*
* This sometimes provides clues in corrupted batchbuffers,
* and is used by the intel-gpu-tools.
*/
bool dump_past_end;
bool overflowed;
};
static FILE *out;
static uint32_t saved_s2 = 0, saved_s4 = 0;
static char saved_s2_set = 0, saved_s4_set = 0;
static uint32_t head_offset = 0xffffffff; /* undefined */
static uint32_t tail_offset = 0xffffffff; /* undefined */
#ifndef ARRAY_SIZE
#define ARRAY_SIZE(A) (sizeof(A)/sizeof(A[0]))
#endif
#define BUFFER_FAIL(_count, _len, _name) do { \
fprintf(out, "Buffer size too small in %s (%d < %d)\n", \
(_name), (_count), (_len)); \
return _count; \
} while (0)
static float int_as_float(uint32_t intval)
{
union intfloat {
uint32_t i;
float f;
} uval;
uval.i = intval;
return uval.f;
}
static void
instr_out(struct drm_intel_decode *ctx, unsigned int index,
const char *fmt, ...) __attribute__((format(__printf__, 3, 4)));
static void
instr_out(struct drm_intel_decode *ctx, unsigned int index,
const char *fmt, ...)
{
va_list va;
const char *parseinfo;
uint32_t offset = ctx->hw_offset + index * 4;
if (index > ctx->count) {
if (!ctx->overflowed) {
fprintf(out, "ERROR: Decode attempted to continue beyond end of batchbuffer\n");
ctx->overflowed = true;
}
return;
}
if (offset == head_offset)
parseinfo = "HEAD";
else if (offset == tail_offset)
parseinfo = "TAIL";
else
parseinfo = " ";
fprintf(out, "0x%08x: %s 0x%08x: %s", offset, parseinfo,
ctx->data[index], index == 0 ? "" : " ");
va_start(va, fmt);
vfprintf(out, fmt, va);
va_end(va);
}
static int
decode_MI_SET_CONTEXT(struct drm_intel_decode *ctx)
{
uint32_t data = ctx->data[1];
if (ctx->gen > 7)
return 1;
instr_out(ctx, 0, "MI_SET_CONTEXT\n");
instr_out(ctx, 1, "gtt offset = 0x%x%s%s\n",
data & ~0xfff,
data & (1<<1)? ", Force Restore": "",
data & (1<<0)? ", Restore Inhibit": "");
return 2;
}
static int
decode_MI_WAIT_FOR_EVENT(struct drm_intel_decode *ctx)
{
const char *cc_wait;
int cc_shift = 0;
uint32_t data = ctx->data[0];
if (ctx->gen <= 5)
cc_shift = 9;
else
cc_shift = 16;
switch ((data >> cc_shift) & 0x1f) {
case 1:
cc_wait = ", cc wait 1";
break;
case 2:
cc_wait = ", cc wait 2";
break;
case 3:
cc_wait = ", cc wait 3";
break;
case 4:
cc_wait = ", cc wait 4";
break;
case 5:
cc_wait = ", cc wait 4";
break;
default:
cc_wait = "";
break;
}
if (ctx->gen <= 5) {
instr_out(ctx, 0, "MI_WAIT_FOR_EVENT%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
data & (1<<18)? ", pipe B start vblank wait": "",
data & (1<<17)? ", pipe A start vblank wait": "",
data & (1<<16)? ", overlay flip pending wait": "",
data & (1<<14)? ", pipe B hblank wait": "",
data & (1<<13)? ", pipe A hblank wait": "",
cc_wait,
data & (1<<8)? ", plane C pending flip wait": "",
data & (1<<7)? ", pipe B vblank wait": "",
data & (1<<6)? ", plane B pending flip wait": "",
data & (1<<5)? ", pipe B scan line wait": "",
data & (1<<4)? ", fbc idle wait": "",
data & (1<<3)? ", pipe A vblank wait": "",
data & (1<<2)? ", plane A pending flip wait": "",
data & (1<<1)? ", plane A scan line wait": "");
} else {
instr_out(ctx, 0, "MI_WAIT_FOR_EVENT%s%s%s%s%s%s%s%s%s%s%s%s\n",
data & (1<<20)? ", sprite C pending flip wait": "", /* ivb */
cc_wait,
data & (1<<13)? ", pipe B hblank wait": "",
data & (1<<11)? ", pipe B vblank wait": "",
data & (1<<10)? ", sprite B pending flip wait": "",
data & (1<<9)? ", plane B pending flip wait": "",
data & (1<<8)? ", plane B scan line wait": "",
data & (1<<5)? ", pipe A hblank wait": "",
data & (1<<3)? ", pipe A vblank wait": "",
data & (1<<2)? ", sprite A pending flip wait": "",
data & (1<<1)? ", plane A pending flip wait": "",
data & (1<<0)? ", plane A scan line wait": "");
}
return 1;
}
static int
decode_mi(struct drm_intel_decode *ctx)
{
unsigned int opcode, len = -1;
const char *post_sync_op = "";
uint32_t *data = ctx->data;
struct {
uint32_t opcode;
int len_mask;
unsigned int min_len;
unsigned int max_len;
const char *name;
int (*func)(struct drm_intel_decode *ctx);
} opcodes_mi[] = {
{ 0x08, 0, 1, 1, "MI_ARB_ON_OFF" },
{ 0x0a, 0, 1, 1, "MI_BATCH_BUFFER_END" },
{ 0x30, 0x3f, 3, 3, "MI_BATCH_BUFFER" },
{ 0x31, 0x3f, 2, 2, "MI_BATCH_BUFFER_START" },
{ 0x14, 0x3f, 3, 3, "MI_DISPLAY_BUFFER_INFO" },
{ 0x04, 0, 1, 1, "MI_FLUSH" },
{ 0x22, 0x1f, 3, 3, "MI_LOAD_REGISTER_IMM" },
{ 0x13, 0x3f, 2, 2, "MI_LOAD_SCAN_LINES_EXCL" },
{ 0x12, 0x3f, 2, 2, "MI_LOAD_SCAN_LINES_INCL" },
{ 0x00, 0, 1, 1, "MI_NOOP" },
{ 0x11, 0x3f, 2, 2, "MI_OVERLAY_FLIP" },
{ 0x07, 0, 1, 1, "MI_REPORT_HEAD" },
{ 0x18, 0x3f, 2, 2, "MI_SET_CONTEXT", decode_MI_SET_CONTEXT },
{ 0x20, 0x3f, 3, 4, "MI_STORE_DATA_IMM" },
{ 0x21, 0x3f, 3, 4, "MI_STORE_DATA_INDEX" },
{ 0x24, 0x3f, 3, 3, "MI_STORE_REGISTER_MEM" },
{ 0x02, 0, 1, 1, "MI_USER_INTERRUPT" },
{ 0x03, 0, 1, 1, "MI_WAIT_FOR_EVENT", decode_MI_WAIT_FOR_EVENT },
{ 0x16, 0x7f, 3, 3, "MI_SEMAPHORE_MBOX" },
{ 0x26, 0x1f, 3, 4, "MI_FLUSH_DW" },
{ 0x28, 0x3f, 3, 3, "MI_REPORT_PERF_COUNT" },
{ 0x29, 0xff, 3, 3, "MI_LOAD_REGISTER_MEM" },
{ 0x0b, 0, 1, 1, "MI_SUSPEND_FLUSH"},
}, *opcode_mi = NULL;
/* check instruction length */
for (opcode = 0; opcode < sizeof(opcodes_mi) / sizeof(opcodes_mi[0]);
opcode++) {
if ((data[0] & 0x1f800000) >> 23 == opcodes_mi[opcode].opcode) {
len = 1;
if (opcodes_mi[opcode].max_len > 1) {
len =
(data[0] & opcodes_mi[opcode].len_mask) + 2;
if (len < opcodes_mi[opcode].min_len
|| len > opcodes_mi[opcode].max_len) {
fprintf(out,
"Bad length (%d) in %s, [%d, %d]\n",
len, opcodes_mi[opcode].name,
opcodes_mi[opcode].min_len,
opcodes_mi[opcode].max_len);
}
}
opcode_mi = &opcodes_mi[opcode];
break;
}
}
if (opcode_mi && opcode_mi->func)
return opcode_mi->func(ctx);
switch ((data[0] & 0x1f800000) >> 23) {
case 0x0a:
instr_out(ctx, 0, "MI_BATCH_BUFFER_END\n");
return -1;
case 0x16:
instr_out(ctx, 0, "MI_SEMAPHORE_MBOX%s%s%s%s %u\n",
data[0] & (1 << 22) ? " global gtt," : "",
data[0] & (1 << 21) ? " update semaphore," : "",
data[0] & (1 << 20) ? " compare semaphore," : "",
data[0] & (1 << 18) ? " use compare reg" : "",
(data[0] & (0x3 << 16)) >> 16);
instr_out(ctx, 1, "value\n");
instr_out(ctx, 2, "address\n");
return len;
case 0x21:
instr_out(ctx, 0, "MI_STORE_DATA_INDEX%s\n",
data[0] & (1 << 21) ? " use per-process HWS," : "");
instr_out(ctx, 1, "index\n");
instr_out(ctx, 2, "dword\n");
if (len == 4)
instr_out(ctx, 3, "upper dword\n");
return len;
case 0x00:
if (data[0] & (1 << 22))
instr_out(ctx, 0,
"MI_NOOP write NOPID reg, val=0x%x\n",
data[0] & ((1 << 22) - 1));
else
instr_out(ctx, 0, "MI_NOOP\n");
return len;
case 0x26:
switch (data[0] & (0x3 << 14)) {
case (0 << 14):
post_sync_op = "no write";
break;
case (1 << 14):
post_sync_op = "write data";
break;
case (2 << 14):
post_sync_op = "reserved";
break;
case (3 << 14):
post_sync_op = "write TIMESTAMP";
break;
}
instr_out(ctx, 0,
"MI_FLUSH_DW%s%s%s%s post_sync_op='%s' %s%s\n",
data[0] & (1 << 22) ?
" enable protected mem (BCS-only)," : "",
data[0] & (1 << 21) ? " store in hws," : "",
data[0] & (1 << 18) ? " invalidate tlb," : "",
data[0] & (1 << 17) ? " flush gfdt," : "",
post_sync_op,
data[0] & (1 << 8) ? " enable notify interrupt," : "",
data[0] & (1 << 7) ?
" invalidate video state (BCS-only)," : "");
if (data[0] & (1 << 21))
instr_out(ctx, 1, "hws index\n");
else
instr_out(ctx, 1, "address\n");
instr_out(ctx, 2, "dword\n");
if (len == 4)
instr_out(ctx, 3, "upper dword\n");
return len;
}
for (opcode = 0; opcode < sizeof(opcodes_mi) / sizeof(opcodes_mi[0]);
opcode++) {
if ((data[0] & 0x1f800000) >> 23 == opcodes_mi[opcode].opcode) {
unsigned int i;
instr_out(ctx, 0, "%s\n",
opcodes_mi[opcode].name);
for (i = 1; i < len; i++) {
instr_out(ctx, i, "dword %d\n", i);
}
return len;
}
}
instr_out(ctx, 0, "MI UNKNOWN\n");
return 1;
}
static void
decode_2d_br00(struct drm_intel_decode *ctx, const char *cmd)
{
instr_out(ctx, 0,
"%s (rgb %sabled, alpha %sabled, src tile %d, dst tile %d)\n",
cmd,
(ctx->data[0] & (1 << 20)) ? "en" : "dis",
(ctx->data[0] & (1 << 21)) ? "en" : "dis",
(ctx->data[0] >> 15) & 1,
(ctx->data[0] >> 11) & 1);
}
static void
decode_2d_br01(struct drm_intel_decode *ctx)
{
const char *format;
switch ((ctx->data[1] >> 24) & 0x3) {
case 0:
format = "8";
break;
case 1:
format = "565";
break;
case 2:
format = "1555";
break;
case 3:
format = "8888";
break;
}
instr_out(ctx, 1,
"format %s, pitch %d, rop 0x%02x, "
"clipping %sabled, %s%s \n",
format,
(short)(ctx->data[1] & 0xffff),
(ctx->data[1] >> 16) & 0xff,
ctx->data[1] & (1 << 30) ? "en" : "dis",
ctx->data[1] & (1 << 31) ? "solid pattern enabled, " : "",
ctx->data[1] & (1 << 31) ?
"mono pattern transparency enabled, " : "");
}
static int
decode_2d(struct drm_intel_decode *ctx)
{
unsigned int opcode, len;
uint32_t *data = ctx->data;
struct {
uint32_t opcode;
unsigned int min_len;
unsigned int max_len;
const char *name;
} opcodes_2d[] = {
{ 0x40, 5, 5, "COLOR_BLT" },
{ 0x43, 6, 6, "SRC_COPY_BLT" },
{ 0x01, 8, 8, "XY_SETUP_BLT" },
{ 0x11, 9, 9, "XY_SETUP_MONO_PATTERN_SL_BLT" },
{ 0x03, 3, 3, "XY_SETUP_CLIP_BLT" },
{ 0x24, 2, 2, "XY_PIXEL_BLT" },
{ 0x25, 3, 3, "XY_SCANLINES_BLT" },
{ 0x26, 4, 4, "Y_TEXT_BLT" },
{ 0x31, 5, 134, "XY_TEXT_IMMEDIATE_BLT" },
{ 0x50, 6, 6, "XY_COLOR_BLT" },
{ 0x51, 6, 6, "XY_PAT_BLT" },
{ 0x76, 8, 8, "XY_PAT_CHROMA_BLT" },
{ 0x72, 7, 135, "XY_PAT_BLT_IMMEDIATE" },
{ 0x77, 9, 137, "XY_PAT_CHROMA_BLT_IMMEDIATE" },
{ 0x52, 9, 9, "XY_MONO_PAT_BLT" },
{ 0x59, 7, 7, "XY_MONO_PAT_FIXED_BLT" },
{ 0x53, 8, 8, "XY_SRC_COPY_BLT" },
{ 0x54, 8, 8, "XY_MONO_SRC_COPY_BLT" },
{ 0x71, 9, 137, "XY_MONO_SRC_COPY_IMMEDIATE_BLT" },
{ 0x55, 9, 9, "XY_FULL_BLT" },
{ 0x55, 9, 137, "XY_FULL_IMMEDIATE_PATTERN_BLT" },
{ 0x56, 9, 9, "XY_FULL_MONO_SRC_BLT" },
{ 0x75, 10, 138, "XY_FULL_MONO_SRC_IMMEDIATE_PATTERN_BLT" },
{ 0x57, 12, 12, "XY_FULL_MONO_PATTERN_BLT" },
{ 0x58, 12, 12, "XY_FULL_MONO_PATTERN_MONO_SRC_BLT"},
};
switch ((data[0] & 0x1fc00000) >> 22) {
case 0x25:
instr_out(ctx, 0,
"XY_SCANLINES_BLT (pattern seed (%d, %d), dst tile %d)\n",
(data[0] >> 12) & 0x8,
(data[0] >> 8) & 0x8, (data[0] >> 11) & 1);
len = (data[0] & 0x000000ff) + 2;
if (len != 3)
fprintf(out, "Bad count in XY_SCANLINES_BLT\n");
instr_out(ctx, 1, "dest (%d,%d)\n",
data[1] & 0xffff, data[1] >> 16);
instr_out(ctx, 2, "dest (%d,%d)\n",
data[2] & 0xffff, data[2] >> 16);
return len;
case 0x01:
decode_2d_br00(ctx, "XY_SETUP_BLT");
len = (data[0] & 0x000000ff) + 2;
if (len != 8)
fprintf(out, "Bad count in XY_SETUP_BLT\n");
decode_2d_br01(ctx);
instr_out(ctx, 2, "cliprect (%d,%d)\n",
data[2] & 0xffff, data[2] >> 16);
instr_out(ctx, 3, "cliprect (%d,%d)\n",
data[3] & 0xffff, data[3] >> 16);
instr_out(ctx, 4, "setup dst offset 0x%08x\n",
data[4]);
instr_out(ctx, 5, "setup background color\n");
instr_out(ctx, 6, "setup foreground color\n");
instr_out(ctx, 7, "color pattern offset\n");
return len;
case 0x03:
decode_2d_br00(ctx, "XY_SETUP_CLIP_BLT");
len = (data[0] & 0x000000ff) + 2;
if (len != 3)
fprintf(out, "Bad count in XY_SETUP_CLIP_BLT\n");
instr_out(ctx, 1, "cliprect (%d,%d)\n",
data[1] & 0xffff, data[2] >> 16);
instr_out(ctx, 2, "cliprect (%d,%d)\n",
data[2] & 0xffff, data[3] >> 16);
return len;
case 0x11:
decode_2d_br00(ctx, "XY_SETUP_MONO_PATTERN_SL_BLT");
len = (data[0] & 0x000000ff) + 2;
if (len != 9)
fprintf(out,
"Bad count in XY_SETUP_MONO_PATTERN_SL_BLT\n");
decode_2d_br01(ctx);
instr_out(ctx, 2, "cliprect (%d,%d)\n",
data[2] & 0xffff, data[2] >> 16);
instr_out(ctx, 3, "cliprect (%d,%d)\n",
data[3] & 0xffff, data[3] >> 16);
instr_out(ctx, 4, "setup dst offset 0x%08x\n",
data[4]);
instr_out(ctx, 5, "setup background color\n");
instr_out(ctx, 6, "setup foreground color\n");
instr_out(ctx, 7, "mono pattern dw0\n");
instr_out(ctx, 8, "mono pattern dw1\n");
return len;
case 0x50:
decode_2d_br00(ctx, "XY_COLOR_BLT");
len = (data[0] & 0x000000ff) + 2;
if (len != 6)
fprintf(out, "Bad count in XY_COLOR_BLT\n");
decode_2d_br01(ctx);
instr_out(ctx, 2, "(%d,%d)\n",
data[2] & 0xffff, data[2] >> 16);
instr_out(ctx, 3, "(%d,%d)\n",
data[3] & 0xffff, data[3] >> 16);
instr_out(ctx, 4, "offset 0x%08x\n", data[4]);
instr_out(ctx, 5, "color\n");
return len;
case 0x53:
decode_2d_br00(ctx, "XY_SRC_COPY_BLT");
len = (data[0] & 0x000000ff) + 2;
if (len != 8)
fprintf(out, "Bad count in XY_SRC_COPY_BLT\n");
decode_2d_br01(ctx);
instr_out(ctx, 2, "dst (%d,%d)\n",
data[2] & 0xffff, data[2] >> 16);
instr_out(ctx, 3, "dst (%d,%d)\n",
data[3] & 0xffff, data[3] >> 16);
instr_out(ctx, 4, "dst offset 0x%08x\n", data[4]);
instr_out(ctx, 5, "src (%d,%d)\n",
data[5] & 0xffff, data[5] >> 16);
instr_out(ctx, 6, "src pitch %d\n",
(short)(data[6] & 0xffff));
instr_out(ctx, 7, "src offset 0x%08x\n", data[7]);
return len;
}
for (opcode = 0; opcode < sizeof(opcodes_2d) / sizeof(opcodes_2d[0]);
opcode++) {
if ((data[0] & 0x1fc00000) >> 22 == opcodes_2d[opcode].opcode) {
unsigned int i;
len = 1;
instr_out(ctx, 0, "%s\n",
opcodes_2d[opcode].name);
if (opcodes_2d[opcode].max_len > 1) {
len = (data[0] & 0x000000ff) + 2;
if (len < opcodes_2d[opcode].min_len ||
len > opcodes_2d[opcode].max_len) {
fprintf(out, "Bad count in %s\n",
opcodes_2d[opcode].name);
}
}
for (i = 1; i < len; i++) {
instr_out(ctx, i, "dword %d\n", i);
}
return len;
}
}
instr_out(ctx, 0, "2D UNKNOWN\n");
return 1;
}
static int
decode_3d_1c(struct drm_intel_decode *ctx)
{
uint32_t *data = ctx->data;
uint32_t opcode;
opcode = (data[0] & 0x00f80000) >> 19;
switch (opcode) {
case 0x11:
instr_out(ctx, 0,
"3DSTATE_DEPTH_SUBRECTANGLE_DISABLE\n");
return 1;
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