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2008-03-21r500: fragment program upload is also used to upload constants.Dave Airlie
Limit frag address to 8 bits
2008-03-20drm: fixup r500fp submissionDave Airlie
2008-03-20nouveau: do not set on-board timer's numerator/denominator to bad valuesStuart Bennett
2008-03-19RADEON: switch over to new production microcodeAlex Deucher
This needs to be tested thoroughly before pushing to the kernel.
2008-03-19RADEON: production microcode for all radeons, r1xx-r6xxAlex Deucher
This updated microcode is not in use yet.
2008-03-19move some more r300 regs into not allowed on r500Dave Airlie
2008-03-18drm: add new rs690 pci idDave Airlie
2008-03-17initial r500 RS and FP register and upload codeDave Airlie
2008-03-17drm/pcigart: fix the pci gart to use the drm_pci wrapper.Dave Airlie
This is the correct fix for the RS690 and hopefully the dma coherent work. For now we limit everybody to a 32-bit DMA mask but it is possible for RS690 to use a 40-bit DMA mask for the GART table itself, and the PCIE cards can use 40-bits for the table entries. Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-03-16Avoid unnecessary waits for command regulator pause.Thomas Hellstrom
2008-03-16[via] Remove some leftover vars.Thomas Hellstrom
2008-03-16[via] The millionth fixup for the millionth-1 attempt to stabilize the AGPThomas Hellstrom
DMA command submission. It's worth remembering that all new bright ideas on how to make this command reader work properly and according to docs will probably fail :( Bring in some old code.
2008-03-16[via] Fix driver after vblank-rework merge.Thomas Hellstrom
2008-03-16drm/rs690: set AGP_BASE_2 to 0Dave Airlie
2008-03-16drm: set rs690 gart base completly.Dave Airlie
The docs state bits 4-11 represent bits 32-39 of a 40-bit address
2008-03 [DRM_IOCTL_NR(SIS_IOCTL_AGP_FREE)] = { sisp_agp_free, 1, 0 } #if 0 /* these don't appear to be defined */ /* SIS Stereo */ [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { sis_control, 1, 1 }, [DRM_IOCTL_NR(SIS_IOCTL_FLIP)] = { sis_flip, 1, 1 }, [DRM_IOCTL_NR(SIS_IOCTL_FLIP_INIT)] = { sis_flip_init, 1, 1 }, [DRM_IOCTL_NR(SIS_IOCTL_FLIP_FINAL)] = { sis_flip_final, 1, 1 } #endif #define __HAVE_COUNTERS 5 #include "drm_auth.h" #include "drm_agpsupport.h" #include "drm_bufs.h" #include "drm_context.h" #include "drm_dma.h" #include "drm_drawable.h" #include "drm_drv.h" #include "drm_fops.h" #include "drm_init.h" #include "drm_ioctl.h" #include "drm_lists.h" #include "drm_lock.h" #include "drm_memory.h" #include "drm_proc.h" #include "drm_vm.h" #include "drm_stub.h"
g the channel's most recent PUT value. Some chips always return 0 on reading these regs, and currently userspace is the only other entity which knows the value. 2008-03-07nouveau: don't touch NV_USER regs on channel destroy.Ben Skeggs Not only was this entirely pointless, it actually causes my NV30GL to die randomly when channels are destroyed. 2008-03-06ttm: make sure userspace can't destroy kernel create memory managersDave Airlie this adds something to say the kernel initialised the memory region not the userspace. and blocks userspace from deallocating kernel areas 2008-03-06drm/ttm: add ioctl to get back memory managed area sizedDave Airlie taken from modesetting branch but could be useful outside it. 2008-03-06drm: reorganise minor number handling using code from modesetting branchDave Airlie Rip out the whole head thing and replace it with an idr and drm_minor structure. 2008-03-05i915: Evict if relocatee buffer is CACHED_MAPPED beforeXiang, Haihao writting relocations, otherwise the GPU probably sees some inconsistent data. Fix fd.o bug#14656 2008-03-04Clarify when WAIT_LAZY is relevant to users.Eric Anholt 2008-03-04Remove unused DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS.Eric Anholt 2008-03-03 [i915] 2D driver may reset Frame count value, this may lead driverZou Nan hai to leap it's vblank count a huge value. This will stall some applications that switch video mode if vblank_mode is set to a non zero value in drirc. 2008-02-29Working revision.Thomas Hellstrom 2008-02-29More post-ioctl work.Thomas Hellstrom 2008-02-27Reinstate buffer idle before applying relocations.Thomas Hellstrom 2008-02-27Don't wait for buffer idle before applying relocations.Thomas Hellstrom 2008-02-26[i915] Relocation fixes.Thomas Hellstrom 2008-02-26Make the execbuffer code reasonably safe against errors.Thomas Hellstrom In particular -EAGAINs, which should be common during Xserver operation. Also handle the fence creation failure case. 2008-02-23fix texture uploads with large 3d textures (bug 13980)Roland Scheidegger Texture uploads could hit the blitter coordinate limit, adjust the texture offset when uploading the pieces. Make sure to check the end address of the upload too. 2008-02-22nouveau: Remove some random (french) comment.Maarten Maathuis 2008-02-22nouveau: A single define of dma skips is more than enough.Maarten Maathuis 2008-02-22Fix one last occurance of struct _drm_i915_batchbuffer.Kristian Høgsberg Thanks to Todd Merrill for pointing it out. 2008-02-22i915: Remove leading underscore from struct tags.Kristian Høgsberg This matches the changes in mesa to use the system drm includes for the definitions of the drm ioctl structs. 2008-02-20fix SAREAAlan Hourihane 2008-02-16[915]: more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)Keith Packard Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on the VGA output on my HP 2510p after resume. 2008-02-16nouveau: no GART on ia64 either.Stephane Marchesin 2008-02-16nv40: actually init all tile regs.Ben Skeggs 2008-02-13i915: Add a dri2 init path that gets the lock from the dri2 sarea.Kristian Høgsberg 2008-02-13i915: Only look up dev_priv->mmio_map if it's not already set upKristian Høgsberg 2008-02-13i915: Add I915_PARAM_CHIPSET_ID param to get chipset ID.Kristian Høgsberg 2008-02-13i915: Make sarea_priv setup optional.Kristian Høgsberg