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path: root/shared-core/nouveau_fifo.c
AgeCommit message (Expand)Author
2007-06-24nouveau: NV4X PFIFO engtab functionsBen Skeggs
2007-06-24nouveau: split PFIFO/PGRAPH context creationBen Skeggs
2007-06-24nouveau: (mostly) hook up put_base againBen Skeggs
2007-05-08nouveau : fix fifo context size for nv10Matthieu Castet
2007-03-26nouveau: move card initialisation into the drmBen Skeggs
2007-03-23nouveau: rework nouveau_fifo_alloc() so the drm can create internal FIFOsBen Skeggs
2007-03-23nouveau: remove unused cruftBen Skeggs
2007-03-21nouveau: support multiple channels per client (breaks drm interface)Ben Skeggs
2007-03-13nouveau: make sure cmdbuf object gets destroyedBen Skeggs
2007-03-13nouveau: associate all created objects with a channel + cleanupsBen Skeggs
2007-03-11nouveau: PUT,GET, not 2xPUTPatrice Mandin
2007-02-28nouveau: intrusive drm interface changesBen Skeggs
2007-02-14nouveau: fix the build on big endian (thanks CyberFoxx)Stephane Marchesin
2007-02-06nouveau: more work on the nv04 context switch code.Stephane Marchesin
2007-02-03nouveau: and of course, I was missing the last nv04 piece.Stephane Marchesin
2007-02-03nouveau: rename registers to their proper names.Stephane Marchesin
2007-01-25nouveau: simplify and fix BIG_ENDIAN flagsPatrice Mandin
2007-01-18nouveau: Remove write to CTX_SIZE. This gives us proper nv3x PGRAPH switching.Jeremy Kolb
2007-01-17nouveau: Try to get nv35 pgraph switching working. Doesn't quite yet.Jeremy Kolb
2007-01-13nouveau: nv20 graph ctx switch.Matthieu Castet
2007-01-13nouveau: first step to make graph ctx worksMatthieu Castet
2007-01-12nouveau : remove useless init : we clear RAMIN beforeMatthieu Castet
2007-01-12nouveau: get nv30 context switching to work.Jeremy Kolb
2007-01-08nouveau: avoid allocating vram that's used as instance memory.Ben Skeggs
2007-01-05Merge branch 'master' of git+ssh://matc@git.freedesktop.org/git/mesa/drm/Matthieu Castet
2007-01-05Add basic pgraph context for nv10.Matthieu Castet
2007-01-05Cleanup the nv04 fifo code a bit.Stephane Marchesin
2007-01-02nouveau: oops, forgot to free RAMIN..Ben Skeggs
2007-01-02nouveau: Hook up grctx code for NV4x.Ben Skeggs
2007-01-02nouveau: Only clobber PFIFO if no channels are already alloc'dBen Skeggs
2006-12-26nouveau: Alloc cmdbuf for each channel individuallyBen Skeggs
2006-12-21nouveau: save/restore endianness flag on FIFO switchBen Skeggs
2006-12-12Port remaining NV4 RAMIN access from the ddx into the drm.Ben Skeggs
2006-12-03Merge the pciid work.Stephane Marchesin
2006-11-30Use nouveau_mem.c to allocate RAMIN.Ben Skeggs
2006-11-30Wrap access to objects in RAMIN.Ben Skeggs
2006-11-28For nv10, bit 16 of RAMFC need to be set for 64 bytes fifo context.Matthieu Castet
2006-11-18Only return FIFO number if the FIFO is marked as in use..Ben Skeggs
2006-11-18Check some return vals, fixes a couple of oopses.Ben Skeggs
2006-11-17Dump some useful info when a PGRAPH error occurs.Ben Skeggs
2006-11-14Completely untested NV10/20/30 FIFO context switching changes.Ben Skeggs
2006-11-14Restructure initialisation a bit.Ben Skeggs
2006-11-14Hack around yet another "X restart borkage without nouveau.ko reload" problem.Ben Skeggs
2006-11-06fixup fifo size so it is page alignedDave Airlie
2006-10-18Remove hack which delays activation of a additional channel. The previously ...Ben Skeggs
2006-10-17NV40: *Now* fifo ctx switching works for me..Ben Skeggs
2006-10-17NV40: FIFO context switching now WorksForMe(tm)Ben Skeggs
2006-10-17Setup NV40 RAMFC (in wrong location.. but anyway), rearrange the RAMFC setup ...Ben Skeggs
2006-10-14Again more work on context switches. They work, sometimes. And when they do t...Stephane Marchesin
2006-10-14Add the missing breaks.Stephane Marchesin
an>nvgrobj->base.channel); nvdev = nouveau_device(chan->base.device); if (nvgrobj->base.grclass) { struct drm_nouveau_gpuobj_free f; f.channel = chan->drm.channel; f.handle = nvgrobj->base.handle; drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE, &f, sizeof(f)); } free(nvgrobj); } void nouveau_grobj_autobind(struct nouveau_grobj *grobj) { struct nouveau_subchannel *subc = NULL; int i; for (i = 0; i < 8; i++) { struct nouveau_subchannel *scc = &grobj->channel->subc[i]; if (scc->gr && scc->gr->bound == NOUVEAU_GROBJ_BOUND_EXPLICIT) continue; if (!subc || scc->sequence < subc->sequence) subc = scc; } if (subc->gr) { subc->gr->bound = NOUVEAU_GROBJ_UNBOUND; subc->gr->subc = -1; } subc->gr = grobj; subc->gr->bound = NOUVEAU_GROBJ_BOUND; subc->gr->subc = subc - &grobj->channel->subc[0]; BEGIN_RING(grobj->channel, grobj, 0x0000, 1); OUT_RING (grobj->channel, grobj->handle); }