summaryrefslogtreecommitdiff
path: root/linux-core
AgeCommit message (Collapse)Author
2007-01-09ttm: make ttm alloc/free into alloc_pages/free_pagesDave Airlie
Add a vmalloc flag to the page flags
2007-01-08add export symbol for memory managerDave Airlie
2007-01-08i830: complete fix for i830 mapsDave Airlie
2007-01-08drm: remove drm_follow_page, and drm_ioremap and ioremapfreeChristoph Hellwig
This comes from the Re: [patch] paravirt: isolate module ops on lkml It needs some testing, please report any regressions caused. Signed-off-by: Dave Airlie <airlied@linux.ie>
2007-01-08fixup i810/i830 to use drm_core_ioremap instead of drm_ioremapDave Airlie
2007-01-05nouveau: Add an mtrr over the whole FBStephane Marchesin
2007-01-02linux-core: Make git ignore generated module symbol version files.Michel Dänzer
2007-01-02nouveau: Add nv40-specific PGRAPH code, not hooked up yet.Ben Skeggs
2007-01-01make build against 2.6.20 hopefullyDave Airlie
2007-01-01fixup permission along line of kernelDave Airlie
2006-12-27Proper allocation of AGP pages for ttms.Thomas Hellstrom
2006-12-21Bug #9120.Thomas Hellstrom
Require at least agpgart version 0.102 for the AGP TTM backend. This should hopefully avoid crashes when the wrong agpgart driver is installed.
2006-12-21Improve memory manager accounting printout formatting.Thomas Hellstrom
2006-12-21Fix buggy aligned allocations.Thomas Hellstrom
2006-12-20Remove the stupid root_node field from the core memory manager.Thomas Hellstrom
2006-12-20Replace vmalloc_32.Thomas Hellstrom
The vmalloc_32 function together with the memset to clear the new pages are replaced with a vmalloc_user. A pre-2.6.18 compat vmalloc_user is added. Please replace any breakage on machines with > 1GB of memory.
2006-12-20Some via PCI posting flushes.Thomas Hellstrom
2006-12-20Merge branch 'nouveau-1'Dave Airlie
2006-12-20fixup symlinks via MakefileDave Airlie
2006-12-20add nouveau symlinks via gitDave Airlie
2006-12-19Security fix. Zero pages before they are handed to user space.Thomas Hellstrom
TTM pages were not cleared when allocated and handed to user space. Sensitive information may leak.
2006-12-19Security fix. Zero pages before they are handed to user space.Thomas Hellstrom
Shared memory areas were not cleared when they are allocated and handed to user space. Sensitive information may leak.
2006-12-19Reclaim buffers locked fixup.Thomas Hellstrom
Avoid calling reclaim_buffers_locked if we don't have a hardware lock. Improve reclaim_buffers_locked deadlock error formatting.
2006-12-19add kcalloc compat for before 2.6.10Dave Airlie
2006-12-19remove do munmap 4 argsDave Airlie
2006-12-19fixup inclusion of agp.hDave Airlie
2006-12-19remove drm pci from 2.5 daysDave Airlie
2006-12-19remove legacy taskqueue codeDave Airlie
2006-12-19drm: remove all 2.4 support for drm development tree.Dave Airlie
Bye bye 2.4 you served us well..
2006-12-19[SPARC]: Respect vm_page_prot in io_remap_page_range().Dave Airlie
Make sure the callers do a pgprot_noncached() on vma->vm_page_prot. Pointed out by Hugh Dickens. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-12-19[PATCH] mm: incorrect VM_FAULT_OOM returns from driversDave Airlie
Some drivers are returning OOM when it is not in response to a memory shortage. Signed-off-by: Nick Piggin <npiggin@suse.de>
2006-12-19fix irq args compatiblity with pre 2.6.19Dave Airlie
2006-12-19make sizeof match the copy structDave Airlie
2006-12-19use spin_lock_init in via dmablitDave Airlie
2006-12-19Revert "drm: ioremap balanced with iounmap for drivers/char/drm"Dave Airlie
This reverts cc22cd8bde39f3e4be8ca9f726a773b0270ebdbc commit. I put this patch incorrectly in .. will fix now
2006-12-19drm: ioremap balanced with iounmap for drivers/char/drmDave Airlie
ioremap must be balanced by an iounmap and failing to do so can result in a memory leak. Tested (compilation only) to make sure the files are compiling without any warning/error due to new changes Signed-off-by: Amol Lad <amol@verismonetworks.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2006-12-16drm/linux-core: drmP.h compilation fixMichael Buesch
I need the following patch to fix compilation of latest drm/linux-core on my ppc64 machine. /home/mb/develop/git/drm/linux-core/savage_bci.c: In function ‘savage_driver_firstopen’: /home/mb/develop/git/drm/linux-core/savage_bci.c:587: error: ‘DRM_MTRR_WC’ undeclared (first use in this function) /home/mb/develop/git/drm/linux-core/savage_bci.c:587: error: (Each undeclared identifier is reported only once /home/mb/develop/git/drm/linux-core/savage_bci.c:587: error: for each function it appears in.) /home/mb/develop/git/drm/linux-core/savage_bci.c: In function ‘savage_driver_lastclose’: /home/mb/develop/git/drm/linux-core/savage_bci.c:664: error: ‘DRM_MTRR_WC’ undeclared (first use in this function) I looked at in-kernel drmP.h and it actually has the same fix in it. Signed-off-by: Michael Buesch <mb@bu3sch.de>
2006-12-15Remove the memory caches for fence objects and memory manager nodes,Thomas Hellstrom
since the support for memory caches has gone from 2.6.20.
2006-12-01Unshare drm_drawable.c again for now.Michel Dänzer
The current version didn't build on BSD, where the new functionality isn't used yet anyway. Whoever changes that will hopefully be able to make the OSes share this file as well.
2006-12-01Track linux-core symlinks in git.Michel Dänzer
2006-11-06drm: fixup page alignment on SAREA map on ppc64Dave Airlie
2006-11-06Merge branch 'master' into nouveau-1Dave Airlie
Conflicts: linux-core/Makefile.kernel
2006-11-05nouveau: add compat ioc32 supportDave Airlie
2006-11-05remove config.hDave Airlie
2006-10-30Bugzilla Bug #8819Thomas Hellstrom
Build fixes for powerpc. Reported by Katerina Barone-Adesi
2006-10-27Last minute changes to support multi-page size buffer offset alignments.Thomas Hellstrom
This will come in very handy for tiled buffers on intel hardware. Also add some padding to interface structures to allow future binary backwards compatible changes.
2006-10-26New mm function names. Update header.Thomas Hellstrom
2006-10-26Add improved alignment functionality to the core memory manager.Thomas Hellstrom
This makes an allocated block actually align itself and returns any wasted space to the manager. Also add some functions to grow and shrink the managed area. This will be used in the future to manage the buffer object swap cache.
2006-10-26Add a one-page hole in the file offset space between buffers.Thomas Hellstrom
2006-10-21Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drmThomas Hellstrom
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-03 16:04:22 +0000
6 /* bumpmap/2 */ #define RADEON_EMIT_RB3D_STENCILREFMASK 7 /* masks/3 */ #define RADEON_EMIT_SE_VPORT_XSCALE 8 /* viewport/6 */ #define RADEON_EMIT_SE_CNTL 9 /* setup/2 */ #define RADEON_EMIT_SE_CNTL_STATUS 10 /* setup/1 */ #define RADEON_EMIT_RE_MISC 11 /* misc/1 */ #define RADEON_EMIT_PP_TXFILTER_0 12 /* tex0/6 */ #define RADEON_EMIT_PP_BORDER_COLOR_0 13 /* tex0/1 */ #define RADEON_EMIT_PP_TXFILTER_1 14 /* tex1/6 */ #define RADEON_EMIT_PP_BORDER_COLOR_1 15 /* tex1/1 */ #define RADEON_EMIT_PP_TXFILTER_2 16 /* tex2/6 */ #define RADEON_EMIT_PP_BORDER_COLOR_2 17 /* tex2/1 */ #define RADEON_EMIT_SE_ZBIAS_FACTOR 18 /* zbias/2 */ #define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT 19 /* tcl/11 */ #define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED 20 /* material/17 */ #define RADEON_MAX_STATE_PACKETS 21 /* Commands understood by cmd_buffer ioctl. More can be added but * obviously these can't be removed or changed: */ #define RADEON_CMD_PACKET 1 /* emit one of the register packets above */ #define RADEON_CMD_SCALARS 2 /* emit scalar data */ #define RADEON_CMD_VECTORS 3 /* emit vector data */ #define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */ #define RADEON_CMD_PACKET3 5 /* emit hw packet */ #define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */ typedef union { int i; struct { char cmd_type, pad0, pad1, pad2; } header; struct { char cmd_type, packet_id, pad0, pad1; } packet; struct { char cmd_type, offset, stride, count; } scalars; struct { char cmd_type, offset, stride, count; } vectors; struct { char cmd_type, buf_idx, pad0, pad1; } dma; } drm_radeon_cmd_header_t; #define RADEON_FRONT 0x1 #define RADEON_BACK 0x2 #define RADEON_DEPTH 0x4 #define RADEON_STENCIL 0x8 /* Primitive types */ #define RADEON_POINTS 0x1 #define RADEON_LINES 0x2 #define RADEON_LINE_STRIP 0x3 #define RADEON_TRIANGLES 0x4 #define RADEON_TRIANGLE_FAN 0x5 #define RADEON_TRIANGLE_STRIP 0x6 /* Vertex/indirect buffer size */ #define RADEON_BUFFER_SIZE 65536 /* Byte offsets for indirect buffer data */ #define RADEON_INDEX_PRIM_OFFSET 20 #define RADEON_SCRATCH_REG_OFFSET 32 #define RADEON_NR_SAREA_CLIPRECTS 12 /* There are 2 heaps (local/AGP). Each region within a heap is a * minimum of 64k, and there are at most 64 of them per heap. */ #define RADEON_LOCAL_TEX_HEAP 0 #define RADEON_AGP_TEX_HEAP 1 #define RADEON_NR_TEX_HEAPS 2 #define RADEON_NR_TEX_REGIONS 64 #define RADEON_LOG_TEX_GRANULARITY 16 #define RADEON_MAX_TEXTURE_LEVELS 12 #define RADEON_MAX_TEXTURE_UNITS 3 #endif /* __RADEON_SAREA_DEFINES__ */ typedef struct { unsigned int red; unsigned int green; unsigned int blue; unsigned int alpha; } radeon_color_regs_t; typedef struct { /* Context state */ unsigned int pp_misc; /* 0x1c14 */ unsigned int pp_fog_color; unsigned int re_solid_color; unsigned int rb3d_blendcntl; unsigned int rb3d_depthoffset; unsigned int rb3d_depthpitch; unsigned int rb3d_zstencilcntl; unsigned int pp_cntl; /* 0x1c38 */ unsigned int rb3d_cntl; unsigned int rb3d_coloroffset; unsigned int re_width_height; unsigned int rb3d_colorpitch; unsigned int se_cntl; /* Vertex format state */ unsigned int se_coord_fmt; /* 0x1c50 */ /* Line state */ unsigned int re_line_pattern; /* 0x1cd0 */ unsigned int re_line_state; unsigned int se_line_width; /* 0x1db8 */ /* Bumpmap state */ unsigned int pp_lum_matrix; /* 0x1d00 */ unsigned int pp_rot_matrix_0; /* 0x1d58 */ unsigned int pp_rot_matrix_1; /* Mask state */ unsigned int rb3d_stencilrefmask; /* 0x1d7c */ unsigned int rb3d_ropcntl; unsigned int rb3d_planemask; /* Viewport state */ unsigned int se_vport_xscale; /* 0x1d98 */ unsigned int se_vport_xoffset; unsigned int se_vport_yscale; unsigned int se_vport_yoffset; unsigned int se_vport_zscale; unsigned int se_vport_zoffset; /* Setup state */ unsigned int se_cntl_status; /* 0x2140 */ /* Misc state */ unsigned int re_top_left; /* 0x26c0 */ unsigned int re_misc; } drm_radeon_context_regs_t; typedef struct { /* Zbias state */ unsigned int se_zbias_factor; /* 0x1dac */ unsigned int se_zbias_constant; } drm_radeon_context2_regs_t; /* Setup registers for each texture unit */ typedef struct { unsigned int pp_txfilter; unsigned int pp_txformat; unsigned int pp_txoffset; unsigned int pp_txcblend; unsigned int pp_txablend; unsigned int pp_tfactor; unsigned int pp_border_color; } drm_radeon_texture_regs_t; typedef struct { unsigned int start; unsigned int finish; unsigned int prim:8; unsigned int stateidx:8; unsigned int numverts:16; /* overloaded as offset/64 for elt prims */ unsigned int vc_format; /* vertex format */ } drm_radeon_prim_t; typedef struct { drm_radeon_context_regs_t context; drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS]; drm_radeon_context2_regs_t context2; unsigned int dirty; } drm_radeon_state_t; typedef struct { unsigned char next, prev; unsigned char in_use; int age; } drm_radeon_tex_region_t; typedef struct { /* The channel for communication of state information to the * kernel on firing a vertex buffer with either of the * obsoleted vertex/index ioctls. */ drm_radeon_context_regs_t context_state; drm_radeon_texture_regs_t tex_state[RADEON_MAX_TEXTURE_UNITS]; unsigned int dirty; unsigned int vertsize; unsigned int vc_format; /* The current cliprects, or a subset thereof. */ drm_clip_rect_t boxes[RADEON_NR_SAREA_CLIPRECTS]; unsigned int nbox; /* Counters for client-side throttling of rendering clients. */ unsigned int last_frame; unsigned int last_dispatch; unsigned int last_clear; drm_radeon_tex_region_t tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS+1]; int tex_age[RADEON_NR_TEX_HEAPS]; int ctx_owner; int pfState; /* number of 3d windows (0,1,2ormore) */ int pfCurrentPage; /* which buffer is being displayed? */ } drm_radeon_sarea_t; /* WARNING: If you change any of these defines, make sure to change the * defines in the Xserver file (xf86drmRadeon.h) * * KW: actually it's illegal to change any of this (backwards compatibility). */ /* Radeon specific ioctls * The device specific ioctl range is 0x40 to 0x79. */ #define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( 0x40, drm_radeon_init_t) #define DRM_IOCTL_RADEON_CP_START DRM_IO( 0x41) #define DRM_IOCTL_RADEON_CP_STOP DRM_IOW( 0x42, drm_radeon_cp_stop_t) #define DRM_IOCTL_RADEON_CP_RESET DRM_IO( 0x43) #define DRM_IOCTL_RADEON_CP_IDLE DRM_IO( 0x44) #define DRM_IOCTL_RADEON_RESET DRM_IO( 0x45) #define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( 0x46, drm_radeon_fullscreen_t) #define DRM_IOCTL_RADEON_SWAP DRM_IO( 0x47) #define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t) #define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t) #define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t) #define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t) #define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t) #define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4e, drm_radeon_texture_t) #define DRM_IOCTL_RADEON_VERTEX2 DRM_IOW( 0x4f, drm_radeon_vertex_t) #define DRM_IOCTL_RADEON_CMDBUF DRM_IOW( 0x50, drm_radeon_cmd_buffer_t) #define DRM_IOCTL_RADEON_GETPARAM DRM_IOWR(0x51, drm_radeon_getparam_t) #define DRM_IOCTL_RADEON_FLIP DRM_IO( 0x52) typedef struct drm_radeon_init { enum { RADEON_INIT_CP = 0x01, RADEON_CLEANUP_CP = 0x02 } func; unsigned long sarea_priv_offset; int is_pci; int cp_mode; int agp_size; int ring_size; int usec_timeout; unsigned int fb_bpp; unsigned int front_offset, front_pitch; unsigned int back_offset, back_pitch; unsigned int depth_bpp; unsigned int depth_offset, depth_pitch; unsigned long fb_offset; unsigned long mmio_offset; unsigned long ring_offset; unsigned long ring_rptr_offset; unsigned long buffers_offset; unsigned long agp_textures_offset; } drm_radeon_init_t; typedef struct drm_radeon_cp_stop { int flush; int idle; } drm_radeon_cp_stop_t; typedef struct drm_radeon_fullscreen { enum { RADEON_INIT_FULLSCREEN = 0x01, RADEON_CLEANUP_FULLSCREEN = 0x02 } func; } drm_radeon_fullscreen_t; #define CLEAR_X1 0 #define CLEAR_Y1 1 #define CLEAR_X2 2 #define CLEAR_Y2 3 #define CLEAR_DEPTH 4 typedef union drm_radeon_clear_rect { float f[5]; unsigned int ui[5]; } drm_radeon_clear_rect_t; typedef struct drm_radeon_clear { unsigned int flags; unsigned int clear_color; unsigned int clear_depth; unsigned int color_mask; unsigned int depth_mask; /* misnamed field: should be stencil */ drm_radeon_clear_rect_t *depth_boxes; } drm_radeon_clear_t; typedef struct drm_radeon_vertex { int prim; int idx; /* Index of vertex buffer */ int count; /* Number of vertices in buffer */ int discard; /* Client finished with buffer? */ } drm_radeon_vertex_t; typedef struct drm_radeon_indices { int prim; int idx; int start; int end; int discard; /* Client finished with buffer? */ } drm_radeon_indices_t; /* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices * - allows multiple primitives and state changes in a single ioctl * - supports driver change to emit native primitives */ typedef struct drm_radeon_vertex2 { int idx; /* Index of vertex buffer */ int discard; /* Client finished with buffer? */ int nr_states; drm_radeon_state_t *state; int nr_prims; drm_radeon_prim_t *prim; } drm_radeon_vertex2_t; /* v1.3 - obsoletes drm_radeon_vertex2 * - allows arbitarily large cliprect list * - allows updating of tcl packet, vector and scalar state * - allows memory-efficient description of state updates * - allows state to be emitted without a primitive * (for clears, ctx switches) * - allows more than one dma buffer to be referenced per ioctl * - supports tcl driver * - may be extended in future versions with new cmd types, packets */ typedef struct drm_radeon_cmd_buffer { int bufsz; char *buf; int nbox; drm_clip_rect_t *boxes; } drm_radeon_cmd_buffer_t; typedef struct drm_radeon_tex_image { unsigned int x, y; /* Blit coordinates */ unsigned int width, height; const void *data; } drm_radeon_tex_image_t; typedef struct drm_radeon_texture { int offset; int pitch; int format; int width; /* Texture image coordinates */ int height; drm_radeon_tex_image_t *image; } drm_radeon_texture_t; typedef struct drm_radeon_stipple { unsigned int *mask; } drm_radeon_stipple_t; typedef struct drm_radeon_indirect { int idx; int start; int end; int discard; } drm_radeon_indirect_t; /* 1.3: An ioctl to get parameters that aren't available to the 3d * client any other way. */ #define RADEON_PARAM_AGP_BUFFER_OFFSET 0x1 typedef struct drm_radeon_getparam { int param; int *value; } drm_radeon_getparam_t; #endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-03 16:04:21 +0000