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path: root/linux-core/drm_vm.c
AgeCommit message (Expand)Author
2005-06-04misc cleanup patch from Adrian BunkDave Airlie
2005-05-28Bugzilla #3217: Create a new __drm_pci_free which is used internally inEric Anholt
2005-04-26Convert BSD code to mostly use bus_dma, the dma abstraction for dealingEric Anholt
2005-03-27Some ia64 platforms may not support write combining on all type of memory,Dave Airlie
2005-01-12Use virt_to_page instead of vmalloc_to_page in drm_do_vm_shm_nopage forFelix Kuehling
2005-01-01Added a new DRM map type _DRM_CONSISTENT for consistent PCI memory. It usesFelix Kuehling
2004-10-23fix pfn vs page for older kernels (2.6.9-rc kernels many not work..)Dave Airlie
2004-10-22Bring in patch from kernel for remap_pfn_rangeJon Smirl
2004-10-18Update Doxygen configuration & comments.Jose Fonseca
2004-10-12Breakout heads into their own data structures.Jon Smirl
2004-10-10Rename fn_tbl to driver. Core driver now uses pci_driver name whichJon Smirl
2004-09-30Lindent of core build. Drivers checked for no binary diffs. A few filesJon Smirl
2004-09-30Make fops per driver instead of global, remove default flush, poll, readJon Smirl
2004-09-27First check in for DRM that splits core from personality modulesJon Smirl
2004-09-20Felix's fix for map request smaller than permanent map sizeJon Smirl
2004-09-05merge back bunch of whitespace and misc changes from kernelDave Airlie
2004-09-05bad code copy for alpha.. fix the member namesDave Airlie
2004-09-05make the AMD64 check a compat thingDave Airlie
2004-09-04Fixup OS_HAS_AGP/OS_HAS_MTRR along lines of patches going to kernel, asDave Airlie
2004-09-04doh.. that makes no sense.. thinko in removal of OS_HAS_AGPDave Airlie
2004-08-30implement drm_core_check_feature and use it .. looks lots nicerDave Airlie
2004-08-27__NO_VERSION__ hasn't been needed since 2.3 days ditch it...Dave Airlie
2004-08-24Merged drmfntbl-0-0-2Dave Airlie
2004-07-20add x86_64 architecture defines from kernel (leave AMD64 defines in forDave Airlie
2004-06-10A few changes for recent redhat.Keith Whitwell
2004-05-30fixes from kernel: Make users of page->count use the provided macrosDave Airlie
2004-01-11Adapt to nopage() prototype change in Linux 2.6.1.Michel Daenzer
2003-09-12linux drm fixesAlan Hourihane
2003-08-15Merge from 2.6 kernel (Linus Torvalds)Michel Daenzer
2003-05-27Merged DRM documentation.Jose Fonseca
2003-05-17do allow reading from read only mappings...Michel Daenzer
2003-05-16Support AGP bridges where the AGP aperture can't be accessed directly byMichel Daenzer
2003-04-08Use list_entry() to get container struct from struct list_head pointers.Leif Delgass
2003-03-30Spelling fixes in comments.Eric Anholt
2002-10-22final part of XFree86 4.2.99.2 mergeAlan Hourihane
2002-08-22Don't (re)define vmalloc_to_page for kernel >= 2.4.19, as it has beenLeif Delgass
2002-08-06Updates from Rusty Russell to:Rik Faith
2002-05-16Allow drm to build under 2.4 and 2.5(.14)Keith Whitwell
2001-12-10merge with linux kernel 2.4.15Alan Hourihane
2001-10-22merge kernel 2.4.13-pre6.Alan Hourihane
2001-09-25merge with 2.4.10 kernelAlan Hourihane
2001-08-19No one's maintaining 2.2.x support - so remove all the cruft.Alan Hourihane
2001-08-14A few warning fixes when actually building under 2.4.9-pre2 + someJeff Hartmann
2001-08-13Sync with Linus 2.4.9-pre2 + make all nopage routines more alikeJeff Hartmann
2001-08-10Commit Keith Owens kernel Makefile changes, merge and commit alpha patchJeff Hartmann
2001-08-07Lots of DRM fixes: added new pieces of template code so the ffb driver canJeff Hartmann
2001-07-23Fixes that allow the modules to be built into the kernelJeff Hartmann
2001-05-23Only authenticated clients can mmap() (Jeff Hartmann).Gareth Hughes
2001-05-01Import of XFree86 4.0.99.3David Dawes
2001-04-09Import -f XFree86 4.0.99.2David Dawes
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-09 22:55:55 +0000
span>NV04_PFIFO_MODE)|(1<<chan->id)); return 0; } void nv40_fifo_destroy_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<<chan->id)); if (chan->ramfc) nouveau_gpuobj_ref_del(dev, &chan->ramfc); } int nv40_fifo_load_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp, tmp2; NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET , RAMFC_RD(DMA_GET)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT , RAMFC_RD(DMA_PUT)); NV_WRITE(NV10_PFIFO_CACHE1_REF_CNT , RAMFC_RD(REF_CNT)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE , RAMFC_RD(DMA_INSTANCE)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_DCOUNT , RAMFC_RD(DMA_DCOUNT)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE , RAMFC_RD(DMA_STATE)); /* No idea what 0x2058 is.. */ tmp = RAMFC_RD(DMA_FETCH); tmp2 = NV_READ(0x2058) & 0xFFF; tmp2 |= (tmp & 0x30000000); NV_WRITE(0x2058, tmp2); tmp &= ~0x30000000; NV_WRITE(NV04_PFIFO_CACHE1_DMA_FETCH , tmp); NV_WRITE(NV04_PFIFO_CACHE1_ENGINE , RAMFC_RD(ENGINE)); NV_WRITE(NV04_PFIFO_CACHE1_PULL1 , RAMFC_RD(PULL1_ENGINE)); NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_VALUE , RAMFC_RD(ACQUIRE_VALUE)); NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP, RAMFC_RD(ACQUIRE_TIMESTAMP)); NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT , RAMFC_RD(ACQUIRE_TIMEOUT)); NV_WRITE(NV10_PFIFO_CACHE1_SEMAPHORE , RAMFC_RD(SEMAPHORE)); NV_WRITE(NV10_PFIFO_CACHE1_DMA_SUBROUTINE , RAMFC_RD(DMA_SUBROUTINE)); NV_WRITE(NV40_PFIFO_GRCTX_INSTANCE , RAMFC_RD(GRCTX_INSTANCE)); NV_WRITE(0x32e4, RAMFC_RD(UNK_40)); /* NVIDIA does this next line twice... */ NV_WRITE(0x32e8, RAMFC_RD(UNK_44)); NV_WRITE(0x2088, RAMFC_RD(UNK_4C)); NV_WRITE(0x3300, RAMFC_RD(UNK_50)); /* not sure what part is PUT, and which is GET.. never seen a non-zero * value appear in a mmio-trace yet.. */ #if 0 tmp = NV_READ(UNK_84); NV_WRITE(NV_PFIFO_CACHE1_GET, tmp ???); NV_WRITE(NV_PFIFO_CACHE1_PUT, tmp ???); #endif /* Don't clobber the TIMEOUT_ENABLED flag when restoring from RAMFC */ tmp = NV_READ(NV04_PFIFO_DMA_TIMESLICE) & ~0x1FFFF; tmp |= RAMFC_RD(DMA_TIMESLICE) & 0x1FFFF; NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, tmp); /* Set channel active, and in DMA mode */ NV_WRITE(NV03_PFIFO_CACHE1_PUSH1 , 0x00010000 | chan->id); /* Reset DMA_CTL_AT_INFO to INVALID */ tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_CTL) & ~(1<<31); NV_WRITE(NV04_PFIFO_CACHE1_DMA_CTL, tmp); return 0; } int nv40_fifo_save_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp; RAMFC_WR(DMA_PUT , NV_READ(NV04_PFIFO_CACHE1_DMA_PUT)); RAMFC_WR(DMA_GET , NV_READ(NV04_PFIFO_CACHE1_DMA_GET)); RAMFC_WR(REF_CNT , NV_READ(NV10_PFIFO_CACHE1_REF_CNT)); RAMFC_WR(DMA_INSTANCE , NV_READ(NV04_PFIFO_CACHE1_DMA_INSTANCE)); RAMFC_WR(DMA_DCOUNT , NV_READ(NV04_PFIFO_CACHE1_DMA_DCOUNT)); RAMFC_WR(DMA_STATE , NV_READ(NV04_PFIFO_CACHE1_DMA_STATE)); tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_FETCH); tmp |= NV_READ(0x2058) & 0x30000000; RAMFC_WR(DMA_FETCH , tmp); RAMFC_WR(ENGINE , NV_READ(NV04_PFIFO_CACHE1_ENGINE)); RAMFC_WR(PULL1_ENGINE , NV_READ(NV04_PFIFO_CACHE1_PULL1)); RAMFC_WR(ACQUIRE_VALUE , NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_VALUE)); tmp = NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP); RAMFC_WR(ACQUIRE_TIMESTAMP, tmp); RAMFC_WR(ACQUIRE_TIMEOUT , NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT)); RAMFC_WR(SEMAPHORE , NV_READ(NV10_PFIFO_CACHE1_SEMAPHORE)); /* NVIDIA read 0x3228 first, then write DMA_GET here.. maybe something * more involved depending on the value of 0x3228? */ RAMFC_WR(DMA_SUBROUTINE , NV_READ(NV04_PFIFO_CACHE1_DMA_GET)); RAMFC_WR(GRCTX_INSTANCE , NV_READ(NV40_PFIFO_GRCTX_INSTANCE)); /* No idea what the below is for exactly, ripped from a mmio-trace */ RAMFC_WR(UNK_40 , NV_READ(NV40_PFIFO_UNK32E4)); /* NVIDIA do this next line twice.. bug? */ RAMFC_WR(UNK_44 , NV_READ(0x32e8)); RAMFC_WR(UNK_4C , NV_READ(0x2088)); RAMFC_WR(UNK_50 , NV_READ(0x3300)); #if 0 /* no real idea which is PUT/GET in UNK_48.. */ tmp = NV_READ(NV04_PFIFO_CACHE1_GET); tmp |= (NV_READ(NV04_PFIFO_CACHE1_PUT) << 16); RAMFC_WR(UNK_48 , tmp); #endif return 0; } int nv40_fifo_init(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; int ret; if ((ret = nouveau_fifo_init(dev))) return ret; NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, 0x2101ffff); return 0; }
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