index : renesas/drm.git	android live master
	libdrm, cloned from git://anongit.freedesktop.org/mesa/drm	Laurent Pinchart

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path: root/libdrm

Age	Commit message (Collapse)	Author
2007-04-10	add addfb/rmfb ioctls	Jakob Bornecrantz
	Originally from Jakob, cleaned up by airlied.
2007-04-05	checkpoint commit: implement SetCrtc so modes can in theory be set from user	Dave Airlie
	This hooks up the userspace mode set it "seems" to work.
2007-04-05	checkpoint commit: added getresources, crtc and output	Dave Airlie
	This adds the user interfaces from Jakob and hooks them up for 3 ioctls GetResources, GetCrtc and GetOutput. I've made the ids for everything fbs, crtcs, outputs and modes go via idr as per krh's suggestion on irc as it make the code nice and consistent.
2007-04-05	initial userspace interface to get modes	Dave Airlie
2007-03-10	Merge branch 'i915-pageflip'	Michel Dänzer
2007-02-25	drm: remove unnecessary NULL checks, and fix some indents..	Jakob Bornecrantz
2007-02-22	Add DRM_VBLANK_FLIP.	Michel Dänzer
	Used to request that a scheduled buffer swap be done as a flip instead of a blit.
2007-02-16	Simple fence object sample driver for via, based on idling the GPU.	Thomas Hellstrom
	Buffer object driver for via. Some changes to buffer object driver callbacks. Improve fence flushing.
2007-02-15	Initial support for fence object classes.	Thomas Hellstrom
	(Fence objects belonging to different command submission mechanisms).
2006-11-09	libdrm: add drmOpenOnce + drmCloseOnce to libdrm	Dave Airlie
2006-11-08	libdrm: add support for server side functionality in libdrm	Dave Airlie
	This adds APIs to allow the X server to use libdrm from the system rather than its own in-built copy.
2006-10-29	Minor bugfix, indentation and removal of unnused variables.	Thomas Hellstrom
2006-10-27	Reserve the new IOCTLs also for *bsd.	Thomas Hellstrom
	Bump libdrm version number to 2.2.0
2006-10-27	Last minute changes to support multi-page size buffer offset alignments.	Thomas Hellstrom
	This will come in very handy for tiled buffers on intel hardware. Also add some padding to interface structures to allow future binary backwards compatible changes.
2006-10-18	Merging drm-ttm-0-2-branch	Thomas Hellstrom
	Conflicts: linux-core/drmP.h linux-core/drm_drv.c linux-core/drm_irq.c linux-core/drm_stub.c shared-core/drm.h shared-core/i915_drv.h shared-core/i915_irq.c
2006-10-17	Remove some debugging messages.	Thomas Hellstrom
2006-10-17	Remove max number of locked pages check and call, since	Thomas Hellstrom
	that is now handled by the memory accounting.
2006-10-17	Implement mm_lock and mm_unlock functions.	Thomas Hellstrom
	The mm_lock function is used when leaving vt. It evicts _all_ buffers. Buffers with the DRM_BO_NO_MOVE attribute set will be guaranteed to get the same offset when / if they are rebound.
2006-10-17	Extend generality for more memory types.	Thomas Hellstrom
	Fix up init and destruction code.
2006-10-11	Compatibility code for 2.6.15-2.6.18. It is ugly but a little comfort is that	Thomas Hellstrom
	it will go away in the mainstream kernel. Some bugfixes, mainly in error paths.
2006-10-11	Big update:	Thomas Hellstrom
	Adapt for new functions in the 2.6.19 kernel. Remove the ability to have multiple regions in one TTM. This simplifies a lot of code. Remove the ability to access TTMs from user space. We don't need it anymore without ttm regions. Don't change caching policy for evicted buffers. Instead change it only when the buffer is accessed by the CPU (on the first page fault). This tremendously speeds up eviction rates. Current code is safe for kernels <= 2.6.14. Should also be OK with 2.6.19 and above.
2006-10-02	Bug 6242: [mach64] Use private DMA buffers, part #3.	George Sapountzis
	Add DRM_PCI_BUFFER_RO flag for mapping PCI DMA buffer read-only. An additional flag is needed, since PCI DMA buffers do not have an associated map.
2006-10-02	Make the user_token 44-bit for TTMs, and have them occupy a unique file space	Thomas Hellstrom
	starting at 0x00100000000. This will hopefully allow us to use unmap_mapping_range(). Note that user-space will need 64-bit file offset support.
2006-09-29	Core vsync: Add flag DRM_VBLANK_NEXTONMISS.	Michel Dänzer
	When this flag is set and the target sequence is missed, wait for the next vertical blank instead of returning immediately. (cherry picked from 89e323e4900af84cc33219ad24eb0b435a039d23 commit)
2006-09-29	Add definition of DRM_VBLANK_SECONDARY.	Michel Dänzer
	(cherry picked from 84b38b63f05e04ade8b1ddfb770047fd86de0d64 commit)
2006-09-29	Add support for tracking drawable information to core	Michel Dänzer
	Actually make the existing ioctls for adding and removing drawables do something useful, and add another ioctl for the X server to update drawable information. The only kind of drawable information tracked so far is cliprects. (cherry picked from 29598e5253ff5c085ccf63580fd24b84db848424 commit)
2006-09-28	Core vsync: Add flag DRM_VBLANK_NEXTONMISS.	Michel Dänzer
	When this flag is set and the target sequence is missed, wait for the next vertical blank instead of returning immediately.
2006-09-28	Add definition of DRM_VBLANK_SECONDARY.	Michel Dänzer
2006-09-28	Add support for tracking drawable information to core	Michel Dänzer
	Actually make the existing ioctls for adding and removing drawables do something useful, and add another ioctl for the X server to update drawable information. The only kind of drawable information tracked so far is cliprects.
2006-09-26	Silence valgrind.	Thomas Hellstrom
2006-09-20	Allow for 64-bit map handles of ttms and buffer objects.	Thomas Hellstrom
2006-09-18	Alternative implementation of page table zeroing using zap page_range.	Thomas Hellstrom
	(Disabled for now) Fix bo_wait_idle bug. Remove stray debug message.
2006-09-18	More verbose error reporting in some cases.	Thomas Hellstrom
	Add a buffer object waitIdle user-space function. Fix some names and minor glitches.
2006-09-15	Some bugfixes.	Thomas Hellstrom
	Change the fence object interface somewhat to allow some more flexibility. Make list IOCTLS really restartable. Try to avoid busy-waits in the kernel using immediate return to user-space with an -EAGAIN.
2006-09-12	Use lazy fence wait when possible even for RW fences. Saves some CPU.	Thomas Hellstrom
	Lindent.
2006-09-12	More bugfixes.	Thomas Hellstrom
	Disable the i915 IRQ turnoff for now since it seems to be causing problems.
2006-09-08	Various bugfixes.	Thomas Hellstrom
2006-09-05	Multithreaded application note.	Thomas Hellstrom
2006-09-05	Fence all unfenced buffers function.	Thomas Hellstrom
2006-09-04	Libdrm function headers. Some renaming.	Thomas Hellstrom
2006-09-01	Flag bit pattern bugfixes. Remove some error messages.	Thomas Hellstrom
2006-09-01	Export buffer info on map and validate ioctls.	Thomas Hellstrom
	Add an info ioctl operation.
2006-09-01	Various bugfixes.	Thomas Hellstrom
2006-08-31	More mapping synchronization.	Thomas Hellstrom
	libdrm validate and fencing functions.
2006-08-30	Remove the buffer object hint field and use it only	Thomas Hellstrom
	as an argument. Validate stub.
2006-08-30	Add missing map flags.	Thomas Hellstrom
2006-08-30	Buffer object mapping and mapping synchronization for multiple clients.	Thomas Hellstrom
2006-08-30	Memory manager init and takedown.	Thomas Hellstrom
2006-08-29	Part of buffer object libdrm interface.	Thomas Hellstrom
2006-08-29	Checkpoint commit. Buffer object flags and IOCTL argument list.	Thomas Hellstrom

• [next]

generated by cgit v1.2.3 (git 2.25.1) at 2025-12-09 00:50:09 +0000

/*
 * Copyright 2008 Advanced Micro Devices, Inc.  
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Author: Stanislaw Skowronek
 */

#include <linux/module.h>
#include <linux/sched.h>

#define ATOM_DEBUG

#include "atom.h"
#include "atom-names.h"
#include "atom-bits.h"

#define ATOM_COND_ABOVE		0
#define ATOM_COND_ABOVEOREQUAL	1
#define ATOM_COND_ALWAYS	2
#define ATOM_COND_BELOW		3
#define ATOM_COND_BELOWOREQUAL	4
#define ATOM_COND_EQUAL		5
#define ATOM_COND_NOTEQUAL	6

#define ATOM_PORT_ATI	0
#define ATOM_PORT_PCI	1
#define ATOM_PORT_SYSIO	2

#define ATOM_UNIT_MICROSEC	0
#define ATOM_UNIT_MILLISEC	1

#define PLL_INDEX	2
#define PLL_DATA	3

typedef struct {
    struct atom_context *ctx;

    uint32_t *ps, *ws;
    int ps_shift;
    uint16_t start;
} atom_exec_context;

int atom_debug = 0;
void atom_execute_table(struct atom_context *ctx, int index, uint32_t *params);

static uint32_t atom_arg_mask[8] = {0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000, 0xFF000000};
static int atom_arg_shift[8] = {0, 0, 8, 16, 0, 8, 16, 24};
static int atom_dst_to_src[8][4] = {	// translate destination alignment field to the source alignment encoding
    { 0, 0, 0, 0 },
    { 1, 2, 3, 0 },
    { 1, 2, 3, 0 },
    { 1, 2, 3, 0 },
    { 4, 5, 6, 7 },
    { 4, 5, 6, 7 },
    { 4, 5, 6, 7 },
    { 4, 5, 6, 7 },
};
static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };

static int debug_depth = 0;
#ifdef ATOM_DEBUG
static void debug_print_spaces(int n)
{
    while(n--)
	printk("   ");
}
#define DEBUG(...) do if(atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while(0)
#define SDEBUG(...) do if(atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while(0)
#else
#define DEBUG(...) do { } while(0)
#define SDEBUG(...) do { } while(0)
#endif

static uint32_t atom_iio_execute(struct atom_context *ctx, int base, uint32_t index, uint32_t data)
{
    uint32_t temp = 0xCDCDCDCD;
    while(1)
	switch(CU8(base)) {
	case ATOM_IIO_NOP:
	    base++;
	    break;
	case ATOM_IIO_READ:
	    temp = ctx->card->reg_read(ctx->card, CU16(base+1));
	    base+=3;
	    break;
	case ATOM_IIO_WRITE:
	    ctx->card->reg_write(ctx->card, CU16(base+1), temp);
	    base+=3;
	    break;
	case ATOM_IIO_CLEAR:
	    temp &= ~((0xFFFFFFFF >> (32-CU8(base+1))) << CU8(base+2));
	    base+=3;
	    break;
	case ATOM_IIO_SET:
	    temp |= (0xFFFFFFFF >> (32-CU8(base+1))) << CU8(base+2);
	    base+=3;
	    break;
	case ATOM_IIO_MOVE_INDEX:
	    temp &= ~((0xFFFFFFFF >> (32-CU8(base+1))) << CU8(base+2));
	    temp |= ((index >> CU8(base+2)) & (0xFFFFFFFF >> (32-CU8(base+1)))) << CU8(base+3);
	    base+=4;
	    break;
	case ATOM_IIO_MOVE_DATA:
	    temp &= ~((0xFFFFFFFF >> (32-CU8(base+1))) << CU8(base+2));
	    temp |= ((data >> CU8(base+2)) & (0xFFFFFFFF >> (32-CU8(base+1)))) << CU8(base+3);
	    base+=4;
	    break;
	case ATOM_IIO_MOVE_ATTR:
	    temp &= ~((0xFFFFFFFF >> (32-CU8(base+1))) << CU8(base+2));
	    temp |= ((ctx->io_attr >> CU8(base+2)) & (0xFFFFFFFF >> (32-CU8(base+1)))) << CU8(base+3);
	    base+=4;
	    break;
	case ATOM_IIO_END:
	    return temp;
	default:
	    printk(KERN_INFO "Unknown IIO opcode.\n");
	    return 0;
	}
}

static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr, uint32_t *saved, int print)
{
    uint32_t idx, val = 0xCDCDCDCD, align, arg;
    struct atom_context *gctx = ctx->ctx;
    arg = attr & 7;
    align = (attr >> 3) & 7;
    switch(arg) {
    case ATOM_ARG_REG:
	idx = U16(*ptr);
	(*ptr)+=2;
	if(print)
	    DEBUG("REG[0x%04X]", idx);
	idx += gctx->reg_block;
	switch(gctx->io_mode) {
	case ATOM_IO_MM:
	    val = gctx->card->reg_read(gctx->card, idx);
	    break;
	case ATOM_IO_PCI:
	    printk(KERN_INFO "PCI registers are not implemented.\n");
	    return 0;
	case ATOM_IO_SYSIO:
	    printk(KERN_INFO "SYSIO registers are not implemented.\n");
	    return 0;
	default:
	    if(!(gctx->io_mode&0x80)) {
		printk(KERN_INFO "Bad IO mode.\n");
		return 0;
	    }
	    if(!gctx->iio[gctx->io_mode&0x7F]) {
		printk(KERN_INFO "Undefined indirect IO read method %d.\n", gctx->io_mode&0x7F);
		return 0;
	    }
	    val = atom_iio_execute(gctx, gctx->iio[gctx->io_mode&0x7F], idx, 0);
	}
	break;
    case ATOM_ARG_PS:
	idx = U8(*ptr);
	(*ptr)++;
	val = ctx->ps[idx];
	if(print)
	    DEBUG("PS[0x%02X,0x%04X]", idx, val);
	break;
    case ATOM_ARG_WS:
	idx = U8(*ptr);
	(*ptr)++;
	if(print)
	    DEBUG("WS[0x%02X]", idx);
	switch(idx) {
	case ATOM_WS_QUOTIENT:
	    val = gctx->divmul[0];
	    break;
	case ATOM_WS_REMAINDER:
	    val = gctx->divmul[1];
	    break;
	case ATOM_WS_DATAPTR:
	    val = gctx->data_block;
	    break;
	case ATOM_WS_SHIFT:
	    val = gctx->shift;
	    break;
	case ATOM_WS_OR_MASK:
	    val = 1<<gctx->shift;
	    break;
	case ATOM_WS_AND_MASK:
	    val = ~(1<<gctx->shift);
	    break;
	case ATOM_WS_FB_WINDOW:
	    val = gctx->fb_base;
	    break;
	case ATOM_WS_ATTRIBUTES:
	    val = gctx->io_attr;
	    break;
	default:
	    val = ctx->ws[idx];
	}
	break;
    case ATOM_ARG_ID:
	idx = U16(*ptr);
	(*ptr)+=2;
	if(print) {
	    if(gctx->data_block)
		DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
	    else
		DEBUG("ID[0x%04X]", idx);
	}
	val = U32(idx + gctx->data_block);
	break;
    case ATOM_ARG_FB:
	idx = U8(*ptr);
	(*ptr)++;
	if(print)
	    DEBUG("FB[0x%02X]", idx);
	printk(KERN_INFO "FB access is not implemented.\n");
	return 0;
    case ATOM_ARG_IMM:
	switch(align) {
	case ATOM_SRC_DWORD:
	    val = U32(*ptr);
	    (*ptr)+=4;
	    if(print)
		DEBUG("IMM 0x%08X\n", val);
	    return val;
	case ATOM_SRC_WORD0:
	case ATOM_SRC_WORD8:
	case ATOM_SRC_WORD16:
	    val = U16(*ptr);
	    (*ptr)+=2;
	    if(print)
		DEBUG("IMM 0x%04X\n", val);
	    return val;
	case ATOM_SRC_BYTE0:
	case ATOM_SRC_BYTE8:
	case ATOM_SRC_BYTE16:
	case ATOM_SRC_BYTE24:
	    val = U8(*ptr);
	    (*ptr)++;
	    if(print)
		DEBUG("IMM 0x%02X\n", val);
	    return val;
	}
	return 0;
    case ATOM_ARG_PLL:
	idx = U8(*ptr);
	(*ptr)++;
	if(print)
	    DEBUG("PLL[0x%02X]", idx);
	gctx->card->reg_write(gctx->card, PLL_INDEX, idx);
	val = gctx->card->reg_read(gctx->card, PLL_DATA);
	break;
    case ATOM_ARG_MC:
	idx = U8(*ptr);
	(*ptr)++;
	if(print)
	    DEBUG("MC[0x%02X]", idx);
	val = gctx->card->mc_read(gctx->card, idx);
	printk(KERN_INFO "MC registers are not implemented.\n");
	return 0;
    }
    if(saved)
	*saved = val;
    val &= atom_arg_mask[align];
    val >>= atom_arg_shift[align];
    if(print)
	switch(align) {
	case ATOM_SRC_DWORD:
	    DEBUG(".[31:0] -> 0x%08X\n", val);
	    break;
	case ATOM_SRC_WORD0:
	    DEBUG(".[15:0] -> 0x%04X\n", val);
	    break;
	case ATOM_SRC_WORD8:
	    DEBUG(".[23:8] -> 0x%04X\n", val);
	    break;
	case ATOM_SRC_WORD16:
	    DEBUG(".[31:16] -> 0x%04X\n", val);
	    break;
	case ATOM_SRC_BYTE0:
	    DEBUG(".[7:0] -> 0x%02X\n", val);
	    break;
	case ATOM_SRC_BYTE8:
	    DEBUG(".[15:8] -> 0x%02X\n", val);
	    break;
	case ATOM_SRC_BYTE16:
	    DEBUG(".[23:16] -> 0x%02X\n", val);
	    break;
	case ATOM_SRC_BYTE24:
	    DEBUG(".[31:24] -> 0x%02X\n", val);
	    break;
	}
    return val;
}

static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
{
    uint32_t align = (attr >> 3) & 7, arg = attr & 7;
    switch(arg) {
    case ATOM_ARG_REG:
    case ATOM_ARG_ID:
	(*ptr)+=2;
	break;
    case ATOM_ARG_PLL:
    case ATOM_ARG_MC:
    case ATOM_ARG_PS:
    case ATOM_ARG_WS:
    case ATOM_ARG_FB:
	(*ptr)++;
	break;
    case ATOM_ARG_IMM:
	switch(align) {
	case ATOM_SRC_DWORD:
	    (*ptr)+=4;
	    return;
	case ATOM_SRC_WORD0:
	case ATOM_SRC_WORD8:
	case ATOM_SRC_WORD16:
	    (*ptr)+=2;
	    return;
	case ATOM_SRC_BYTE0:
	case ATOM_SRC_BYTE8:
	case ATOM_SRC_BYTE16:
	case ATOM_SRC_BYTE24:
	    (*ptr)++;
	    return;
	}
	return;
    }
}

static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
{
    return atom_get_src_int(ctx, attr, ptr, NULL, 1);
}

static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr, uint32_t *saved, int print)
{
    return atom_get_src_int(ctx, arg|atom_dst_to_src[(attr>>3)&7][(attr>>6)&3]<<3, ptr, saved, print);
}

static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
{
    atom_skip_src_int(ctx, arg|atom_dst_to_src[(attr>>3)&7][(attr>>6)&3]<<3, ptr);
}

static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr, uint32_t val, uint32_t saved)
{
    uint32_t align = atom_dst_to_src[(attr>>3)&7][(attr>>6)&3], old_val = val, idx;
    struct atom_context *gctx = ctx->ctx;
    old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
    val <<= atom_arg_shift[align];
    val &= atom_arg_mask[align];
    saved &= ~atom_arg_mask[align];
    val |= saved;
    switch(arg) {
    case ATOM_ARG_REG:
	idx = U16(*ptr);
	(*ptr)+=2;
	DEBUG("REG[0x%04X]", idx);
	idx += gctx->reg_block;
	switch(gctx->io_mode) {
	case ATOM_IO_MM:
	    if(idx == 0)
		gctx->card->reg_write(gctx->card, idx, val<<2);
	    else
		gctx->card->reg_write(gctx->card, idx, val);
	    break;
	case ATOM_IO_PCI:
	    printk(KERN_INFO "PCI registers are not implemented.\n");
	    return;
	case ATOM_IO_SYSIO:
	    printk(KERN_INFO "SYSIO registers are not implemented.\n");
	    return;
	default:
	    if(!(gctx->io_mode&0x80)) {
		printk(KERN_INFO "Bad IO mode.\n");
		return;
	    }
	    if(!gctx->iio[gctx->io_mode&0xFF]) {
		printk(KERN_INFO "Undefined indirect IO write method %d.\n", gctx->io_mode&0x7F);
		return;
	    }
	    atom_iio_execute(gctx, gctx->iio[gctx->io_mode&0xFF], idx, val);
	}
	break;
    case ATOM_ARG_PS:
	idx = U8(*ptr);
	(*ptr)++;
	DEBUG("PS[0x%02X]", idx);
	ctx->ps[idx] = val;
	break;
    case ATOM_ARG_WS:
	idx = U8(*ptr);
	(*ptr)++;
	DEBUG("WS[0x%02X]", idx);
	switch(idx) {
	case ATOM_WS_QUOTIENT:
	    gctx->divmul[0] = val;
	    break;
	case ATOM_WS_REMAINDER:
	    gctx->divmul[1] = val;
	    break;
	case ATOM_WS_DATAPTR:
	    gctx->data_block = val;
	    break;
	case ATOM_WS_SHIFT:
	    gctx->shift = val;
	    break;
	case ATOM_WS_OR_MASK:
	case ATOM_WS_AND_MASK:
	    break;
	case ATOM_WS_FB_WINDOW:
	    gctx->fb_base = val;
	    break;
	case ATOM_WS_ATTRIBUTES:
	    gctx->io_attr = val;
	    break;
	default:
	    ctx->ws[idx] = val;
	}
	break;
    case ATOM_ARG_FB:
	idx = U8(*ptr);
	(*ptr)++;
	DEBUG("FB[0x%02X]", idx);
	printk(KERN_INFO "FB access is not implemented.\n");
	return;
    case ATOM_ARG_PLL:
	idx = U8(*ptr);
	(*ptr)++;
	DEBUG("PLL[0x%02X]", idx);
	gctx->card->reg_write(gctx->card, PLL_INDEX, idx);
	gctx->card->reg_write(gctx->card, PLL_DATA, val);
	break;
    case ATOM_ARG_MC:
	idx = U8(*ptr);
	(*ptr)++;
	DEBUG("MC[0x%02X]", idx);
	gctx->card->mc_write(gctx->card, idx, val);
	printk(KERN_INFO "MC registers are not implemented.\n");
	return;
    }
    switch(align) {
    case ATOM_SRC_DWORD:
	DEBUG(".[31:0] <- 0x%08X\n", old_val);
	break;
    case ATOM_SRC_WORD0:
	DEBUG(".[15:0] <- 0x%04X\n", old_val);
	break;
    case ATOM_SRC_WORD8:
	DEBUG(".[23:8] <- 0x%04X\n", old_val);
	break;
    case ATOM_SRC_WORD16:
	DEBUG(".[31:16] <- 0x%04X\n", old_val);
	break;
    case ATOM_SRC_BYTE0:
	DEBUG(".[7:0] <- 0x%02X\n", old_val);
	break;
    case ATOM_SRC_BYTE8:
	DEBUG(".[15:8] <- 0x%02X\n", old_val);
	break;
    case ATOM_SRC_BYTE16:
	DEBUG(".[23:16] <- 0x%02X\n", old_val);
	break;
    case ATOM_SRC_BYTE24:
	DEBUG(".[31:24] <- 0x%02X\n", old_val);
	break;
    }
}

static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t attr = U8((*ptr)++);
    uint32_t dst, src, saved;
    int dptr = *ptr;
    SDEBUG("   dst: ");
    dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
    SDEBUG("   src: ");
    src = atom_get_src(ctx, attr, ptr);
    dst += src;
    SDEBUG("   dst: ");
    atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}

static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t attr = U8((*ptr)++);
    uint32_t dst, src, saved;
    int dptr = *ptr;
    SDEBUG("   dst: ");
    dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
    SDEBUG("   src: ");
    src = atom_get_src(ctx, attr, ptr);
    dst &= src;
    SDEBUG("   dst: ");
    atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}

static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
{
    printk("ATOM BIOS beeped!\n");
}

static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
{
    int idx = U8((*ptr)++);
    if(idx < ATOM_TABLE_NAMES_CNT)
	SDEBUG("   table: %d (%s)\n", idx, atom_table_names[idx]);
    else
	SDEBUG("   table: %d\n", idx);
    if(U16(ctx->ctx->cmd_table + 4 + 2*idx))
	atom_execute_table(ctx->ctx, idx, ctx->ps+ctx->ps_shift);
}

static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t attr = U8((*ptr)++);
    uint32_t saved;
    int dptr = *ptr;
    attr &= 0x38;
    attr |= atom_def_dst[attr>>3]<<6;
    atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
    SDEBUG("   dst: ");
    atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
}

static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t attr = U8((*ptr)++);
    uint32_t dst, src;
    SDEBUG("   src1: ");
    dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
    SDEBUG("   src2: ");
    src = atom_get_src(ctx, attr, ptr);
    ctx->ctx->cs_equal = (dst == src);
    ctx->ctx->cs_above = (dst > src);
    SDEBUG("   result: %s %s\n", ctx->ctx->cs_equal?"EQ":"NE", ctx->ctx->cs_above?"GT":"LE");
}

static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t count = U8((*ptr)++);
    SDEBUG("   count: %d\n", count);
    if(arg == ATOM_UNIT_MICROSEC)
	schedule_timeout_uninterruptible(usecs_to_jiffies(count));
    else
	schedule_timeout_uninterruptible(msecs_to_jiffies(count));
}

static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t attr = U8((*ptr)++);
    uint32_t dst, src;
    SDEBUG("   src1: ");
    dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
    SDEBUG("   src2: ");
    src = atom_get_src(ctx, attr, ptr);
    if(src != 0) {
	ctx->ctx->divmul[0] = dst/src;
	ctx->ctx->divmul[1] = dst%src;
    } else {
	ctx->ctx->divmul[0] = 0;
	ctx->ctx->divmul[1] = 0;
    }
}

static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
{
    /* functionally, a nop */
}

static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
{
    int execute = 0, target = U16(*ptr);
    (*ptr)+=2;
    switch(arg) {
    case ATOM_COND_ABOVE:
	execute = ctx->ctx->cs_above;
	break;
    case ATOM_COND_ABOVEOREQUAL:
	execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
	break;
    case ATOM_COND_ALWAYS:
	execute = 1;
	break;
    case ATOM_COND_BELOW:
	execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
	break;
    case ATOM_COND_BELOWOREQUAL:
	execute = !ctx->ctx->cs_above;
	break;
    case ATOM_COND_EQUAL:
	execute = ctx->ctx->cs_equal;
	break;
    case ATOM_COND_NOTEQUAL:
	execute = !ctx->ctx->cs_equal;
	break;
    }
    if(arg != ATOM_COND_ALWAYS)
	SDEBUG("   taken: %s\n", execute?"yes":"no");
    SDEBUG("   target: 0x%04X\n", target);
    if(execute)
	*ptr = ctx->start+target;
}

static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t attr = U8((*ptr)++);
    uint32_t dst, src1, src2, saved;
    int dptr = *ptr;
    SDEBUG("   dst: ");
    dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
    SDEBUG("   src1: ");
    src1 = atom_get_src(ctx, attr, ptr);
    SDEBUG("   src2: ");
    src2 = atom_get_src(ctx, attr, ptr);
    dst &= src1;
    dst |= src2;
    SDEBUG("   dst: ");
    atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}

static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t attr = U8((*ptr)++);
    uint32_t src, saved;
    int dptr = *ptr;
    if(((attr>>3)&7) != ATOM_SRC_DWORD)
	atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
    else {
	atom_skip_dst(ctx, arg, attr, ptr);
	saved = 0xCDCDCDCD;
    }
    SDEBUG("   src: ");
    src = atom_get_src(ctx, attr, ptr);
    SDEBUG("   dst: ");
    atom_put_dst(ctx, arg, attr, &dptr, src, saved);
}

static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t attr = U8((*ptr)++);
    uint32_t dst, src;
    SDEBUG("   src1: ");
    dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
    SDEBUG("   src2: ");
    src = atom_get_src(ctx, attr, ptr);
    ctx->ctx->divmul[0] = dst*src;
}

static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
{
    /* nothing */
}

static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t attr = U8((*ptr)++);
    uint32_t dst, src, saved;
    int dptr = *ptr;
    SDEBUG("   dst: ");
    dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
    SDEBUG("   src: ");
    src = atom_get_src(ctx, attr, ptr);
    dst |= src;
    SDEBUG("   dst: ");
    atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}

static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
{
    uint8_t val = U8((*ptr)++);
    SDEBUG("POST card output: 0x%02X\n", val);
}

static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
{
    printk(KERN_INFO "unimplemented!\n");
}

static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
{
    printk(KERN_INFO "unimplemented!\n");
}

static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
{