index : renesas/drm.git	android live master
	libdrm, cloned from git://anongit.freedesktop.org/mesa/drm	Laurent Pinchart

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log msg author committer range

Age	Commit message (Expand)	Author
2007-05-31	i915: Add support for 945GME chip	Wang Zhenyu
2007-05-31	i915: Add support for 965GME/GLE chip.	Wang Zhenyu
2007-05-29	Update a bunch of FreeBSD port code.	Jung-uk Kim
2007-05-29	reformatting, clean-ups	Brian
2007-05-29	Clean-ups and reformatting.	Brian
2007-05-27	drm: move context handling code to use linux idr	Dave Airlie
2007-05-27	drm: convert drawable handling to use Linux idr	Dave Airlie
2007-05-26	drm: spinlock initializer cleanup	Thomas Gleixner
2007-05-26	drm: make sure the drawable code doesn't call malloc(0).	Michel Dänzer
2007-05-26	radeon: add other IGP chipsets	Dave Airlie
2007-05-26	Revert "drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls."	Dave Airlie
2007-05-26	Revert "drm/ttm: cleanup most of fence ioctl split out"	Dave Airlie
2007-05-26	whitespace fixups from kernel	Dave Airlie
2007-05-26	ati_pcigart: cut to 80 chars	Dave Airlie
2007-05-26	drm/ttm: cleanup most of fence ioctl split out	Dave Airlie
2007-05-26	drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls.	Dave Airlie
2007-05-26	drm: cleanup use of Linux list handling macros	Dave Airlie
2007-05-17	nouveau: don't build the module by default	Stephane Marchesin
2007-05-13	r300: Added my comments into r300_reg.h.	Oliver McFadden
2007-05-13	r300: Synchronized R300 register defines file.	Oliver McFadden
2007-05-12	nouveau : nv10 graph move clipping value to per channel init	Matthieu Castet
2007-05-12	nouveau : nv10 graph clipping values were forgoten in ddx to drm commit	Matthieu Castet
2007-05-10	Allow vblank interrupts to remain disabled across VT switch.	Keith Packard
2007-05-09	r300: Synchronized R300 register defines file.	Oliver McFadden
2007-05-09	r300: Synchronized R300 register defines file.	Oliver McFadden
2007-05-08	nouveau : fix fifo context size for nv10	Matthieu Castet
2007-05-08	ttm: complete drm buffer object ioctl split	Dave Airlie
2007-05-08	drm/ttm: remove old fence ioctl	Dave Airlie
2007-05-08	drm/ttm: ioctl cleanup for buffer object - user side only	Dave Airlie
2007-05-08	libdrm: fix typo on ttm fence interface	Dave Airlie
2007-05-06	s/OJBECTS/OBJECTS/	Brian
2007-05-06	r300: Synchronize the register file from Mesa.	Oliver McFadden
2007-05-06	r300: Use the defined names for known registers.	Oliver McFadden
2007-05-06	drm/ttm: cleanup most of fence ioctl split out	Dave Airlie
2007-05-06	drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls.	Dave Airlie
2007-05-06	drm: remove unused define DRM_HAS_TTM	Dave Airlie
2007-05-02	Fix buffer object list freeing.	Thomas Hellstrom
2007-05-01	Fix userspace ABI breakage from 3c384a9ad5f964709a237cfe035ea5d6df2da5fa.	Michel Dänzer
2007-04-29	radeon: Don't mess up page flipping when a file descriptor is closed.	Michel Dänzer
2007-04-28	move i915 to new drm_wait_on function	Dave Airlie
2007-04-28	drm: add new drm_wait_on function to replace macro	Dave Airlie
2007-04-28	remove register usage	Dave Airlie
2007-04-28	remove DRM_GETSAREA and replace with drm_getsarea function	Dave Airlie
2007-04-26	Revert "bug 7092 : add pci ids for mach64 in Dell poweredge 4200"	George Sapountzis
2007-04-26	linux: minor indent.	George Sapountzis
2007-04-26	freebsd: remove stray apperance of IN_MODULE.	George Sapountzis
2007-04-26	libdrm: remove HAVE_XORG_CONFIG_H and XFree86LOADER ifdef's.	George Sapountzis
2007-04-26	update create_lk_drm.sh script	Dave Airlie
2007-04-26	whitespace cleanup	Dave Airlie
2007-04-26	remove some whitespace violation	Dave Airlie

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generated by cgit v1.2.3 (git 2.25.1) at 2025-12-21 16:09:46 +0000

/* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
 */
/* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

/**
 * \file mga_dma.c
 * DMA support for MGA G200 / G400.
 * 
 * \author Rickard E. (Rik) Faith <faith@valinux.com>
 * \author Jeff Hartmann <jhartmann@valinux.com>
 * \author Keith Whitwell <keith@tungstengraphics.com>
 * \author Gareth Hughes <gareth@valinux.com>
 */

#include "drmP.h"
#include "drm.h"
#include "drm_sarea.h"
#include "mga_drm.h"
#include "mga_drv.h"

#define MGA_DEFAULT_USEC_TIMEOUT	10000
#define MGA_FREELIST_DEBUG		0

#define MINIMAL_CLEANUP    0
#define FULL_CLEANUP       1
static int mga_do_cleanup_dma(drm_device_t * dev, int full_cleanup);

/* ================================================================
 * Engine control
 */

int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
{
	u32 status = 0;
	int i;
	DRM_DEBUG("\n");

	for (i = 0; i < dev_priv->usec_timeout; i++) {
		status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
		if (status == MGA_ENDPRDMASTS) {
			MGA_WRITE8(MGA_CRTC_INDEX, 0);
			return 0;
		}
		DRM_UDELAY(1);
	}

#if MGA_DMA_DEBUG
	DRM_ERROR("failed!\n");
	DRM_INFO("   status=0x%08x\n", status);
#endif
	return DRM_ERR(EBUSY);
}

static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
{
	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;

	DRM_DEBUG("\n");

	/* The primary DMA stream should look like new right about now.
	 */
	primary->tail = 0;
	primary->space = primary->size;
	primary->last_flush = 0;

	sarea_priv->last_wrap = 0;

	/* FIXME: Reset counters, buffer ages etc...
	 */

	/* FIXME: What else do we need to reinitialize?  WARP stuff?
	 */

	return 0;
}

/* ================================================================
 * Primary DMA stream
 */

void mga_do_dma_flush(drm_mga_private_t * dev_priv)
{
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
	u32 head, tail;
	u32 status = 0;
	int i;
	DMA_LOCALS;
	DRM_DEBUG("\n");

	/* We need to wait so that we can do an safe flush */
	for (i = 0; i < dev_priv->usec_timeout; i++) {
		status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
		if (status == MGA_ENDPRDMASTS)
			break;
		DRM_UDELAY(1);
	}

	if (primary->tail == primary->last_flush) {
		DRM_DEBUG("   bailing out...\n");
		return;
	}

	tail = primary->tail + dev_priv->primary->offset;

	/* We need to pad the stream between flushes, as the card
	 * actually (partially?) reads the first of these commands.
	 * See page 4-16 in the G400 manual, middle of the page or so.
	 */
	BEGIN_DMA(1);

	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);

	ADVANCE_DMA();

	primary->last_flush = primary->tail;

	head = MGA_READ(MGA_PRIMADDRESS);

	if (head <= tail) {
		primary->space = primary->size - primary->tail;
	} else {
		primary->space = head - tail;
	}

	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
	DRM_DEBUG("   tail = 0x%06lx\n", tail - dev_priv->primary->offset);
	DRM_DEBUG("  space = 0x%06x\n", primary->space);

	mga_flush_write_combine();
	MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access);

	DRM_DEBUG("done.\n");
}

void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
{
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
	u32 head, tail;
	DMA_LOCALS;
	DRM_DEBUG("\n");

	BEGIN_DMA_WRAP();

	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);

	ADVANCE_DMA();

	tail = primary->tail + dev_priv->primary->offset;

	primary->tail = 0;
	primary->last_flush = 0;
	primary->last_wrap++;

	head = MGA_READ(MGA_PRIMADDRESS);

	if (head == dev_priv->primary->offset) {
		primary->space = primary->size;
	} else {
		primary->space = head - dev_priv->primary->offset;
	}

	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
	DRM_DEBUG("   tail = 0x%06x\n", primary->tail);
	DRM_DEBUG("   wrap = %d\n", primary->last_wrap);
	DRM_DEBUG("  space = 0x%06x\n", primary->space);

	mga_flush_write_combine();
	MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access);

	set_bit(0, &primary->wrapped);
	DRM_DEBUG("done.\n");
}

void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
{
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
	u32 head = dev_priv->primary->offset;
	DRM_DEBUG("\n");

	sarea_priv->last_wrap++;
	DRM_DEBUG("   wrap = %d\n", sarea_priv->last_wrap);

	mga_flush_write_combine();
	MGA_WRITE(MGA_PRIMADDRESS, head | MGA_DMA_GENERAL);

	clear_bit(0, &primary->wrapped);
	DRM_DEBUG("done.\n");
}

/* ================================================================
 * Freelist management
 */

#define MGA_BUFFER_USED		~0
#define MGA_BUFFER_FREE		0

#if MGA_FREELIST_DEBUG
static void mga_freelist_print(drm_device_t * dev)
{
	drm_mga_private_t *dev_priv = dev->dev_private;
	drm_mga_freelist_t *entry;

	DRM_INFO("\n");
	DRM_INFO("current dispatch: last=0x%x done=0x%x\n",
		 dev_priv->sarea_priv->last_dispatch,
		 (unsigned int)(MGA_READ(MGA_PRIMADDRESS) -
				dev_priv->primary->offset));
	DRM_INFO("current freelist:\n");

	for (entry = dev_priv->head->next; entry; entry = entry->next) {
		DRM_INFO("   %p   idx=%2d  age=0x%x 0x%06lx\n",
			 entry, entry->buf->idx, entry->age.head,
			 entry->age.head - dev_priv->primary->offset);
	}
	DRM_INFO("\n");
}
#endif

static int mga_freelist_init(drm_device_t * dev, drm_mga_private_t * dev_priv)
{
	drm_device_dma_t *dma = dev->dma;
	drm_buf_t *buf;
	drm_mga_buf_priv_t *buf_priv;
	drm_mga_freelist_t *entry;