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2005-01-09Adjust 4 level page check for <= 2.6.10Jon Smirl
2005-01-08Fixed off-by-one error in savage_bci_wait_fifo_shadow.Felix Kuehling
2005-01-07via updates: moved the verifier state struct to dev_priv. Implemented AGPThomas Hellstrom
alignment check.
2005-01-07Updated via DRM with check for stray FIRE commands primitive list.Thomas Hellstrom
2005-01-06Add i915GM support Add resume functionality (must be used with later DDX)Alan Hourihane
Bump to 1.2
2005-01-06Adjust drm-memory for 4 level page tables in 2.6.10 ifdef'd to use 3 levelsJon Smirl
in kernels older than 2.6.10
2005-01-06via DRM: Updated the verifier to check the vertex lists more thorough. ThisThomas Hellstrom
should hopefully stop it from getting out of sync. The PCI command parser is still not updated.
2005-01-053D scissor regs are now managed by the DRM to iterate over clip rectsFelix Kuehling
passed to the cmdbuf ioctl (try xeyes on top of glxgears ;-) Tightened the texture state check Bumped Savage DRM version to 2.1.0 so that DRI driver can (theoretically) depend on the DRM to manage the scissor registers
2005-01-05Bumped driver date and minor version.Thomas Hellstrom
2005-01-05VIA update:Thomas Hellstrom
Release video futexes when context is destroyed (This was previously done by the X server). Added New Unichrome Pro VIDEO DMA commands to the verifier. Added Quiescent heavyweight lock mode.
2005-01-05Fixed the DMA buffer age test. Should fix occasional "soft" lockups. BumpedFelix Kuehling
patch level and driver date.
2005-01-01Completeley rewritten Savage DRM which can be considered secure (moduloFelix Kuehling
implementation errors). Direct hardware (MMIO, BCI) access is no longer needed in the Mesa driver. Bumped version to 2.0.0. Corresponding changes to the DDX and Mesa drivers are being committed.
2005-01-01Added a new DRM map type _DRM_CONSISTENT for consistent PCI memory. It usesFelix Kuehling
drm_pci_alloc/free for allocating/freeing the memory. Only implemented in the Linux DRM so far.
2005-01-01i810/i830 bug with Jon's file operations changesDave Airlie
2004-12-31VIA DRM: verifier: Added verbose palette error reporting, and support forThomas Hellstrom
stipple palettes together with rudimentary checks for texture palette sizes. other: Bumped version patchlevel and driver date.
2004-12-31VIA DRM: Stability enhancements and cleanups in via_dma.c Added explicitThomas Hellstrom
licence notice in via_dma.c
2004-12-21via DRM: Tightened the security for some functions of theThomas Hellstrom
DRM_IOCTL_VIA_DMA_INIT IOCTL. Bumped patchlevel and driver date. XFree86 bug: 2119
2004-12-20Copy HC_ParaType_Auto change to shared-core. Bump version numbers andKeith Whitwell
dates.
2004-12-20Add a very simple install target. I expect there are more correct ways toKeith Whitwell
do this.
2004-12-19via changes: Fixed typecasting bug in via_dma.c, and possible short-circuitThomas Hellstrom
bug in the cmdbuf_size ioctl. Modified ring-buffer jump code AGAIN, due to new oddities discovered on the Unichrome Pro with faster processors. Bumped patchlevel and driver date.
2004-12-17Add the 'Auto' pageflipping command to the verifier. I don't think anyKeith Whitwell
verification is required for the arguments of this packet from a security point of view.
2004-12-16drm_pciids.h should only 'cleaned' when the shared/ directory exists. WhichAlan Hourihane
the Makefile already knows about, but it was cleaning this file anyway.
2004-12-15Use SYSCTL_ADD_OID macro instead of calling function directly.Eric Anholt
Submitted by: reffie@FreeBSD.org
2004-12-13VIA drm updates:Thomas Hellstrom
1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-10Use wbinvd macro instead of assembly for it,Dave Airlie
From: Stefan Dirsch <sndirsch@suse.de> Signed-off-by: Dave Airlie <airlied@linux.ie>
2004-12-08(Stephane Marchesin, me) add hyperz support to radeon drm. Only fast zRoland Scheidegger
clear and z buffer compression are working correctly, hierarchical-z is not.
2004-12-07Patch from Jon Smirl from Nov. 2nd that makes older X servers behave wellThomas Hellstrom
with linux-core. Without this, they will fail on their second invocation since the drm already has a busID assigned. Submitted by: Jon Smirl
2004-12-07Fix up linux 2.4 series Makefiles for via_verifier.cThomas Hellstrom
2004-12-06Security and optimization fixes for the via drm:Thomas Hellstrom
1. The command verifier was never initialized in the non-core source tree. 2. Check added that the AGP ring buffer has been initialized before accepting command buffer. 3. Free space check in the AGP buffer is moved to after command verification, which is more optimal in most cases.
2004-12-03Added 3D functionality to the via command verifier. Modified the viaThomas Hellstrom
ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03Make 1-bit fields be unsigned (no sign bit :). sparse complains about them:Dave Airlie
drivers/char/drm/sis_ds.h:88:12: warning: dubious one-bit signed bitfield drivers/char/drm/sis_ds.h:89:16: warning: dubious one-bit signed bitfield Signed-off-by: Randy Dunlap <rddunlap@osdl.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
2004-11-27Reworked PCI MMIO command buffer parser, and imported code from the MesaThomas Hellstrom
driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-11patch from bug 1803 - will try and push to kernel soonDave Airlie
2004-11-09Fix more build problems on linux-coreJon Smirl
2004-11-09make linux-core build againJon Smirl
2004-11-09add missing CHIP_RV350 to radeon_enumsRoland Scheidegger
2004-11-07Refine the locking of the DRM. Most significant is covering the driverEric Anholt
ioctls with dev_lock, which is a major step toward being able to remove Giant. Covers some new pieces (dev->unique*) in the core, and avoids one call down into system internals with the drm lock held, which is usually bad (FreeBSD LOR #23, #27).
2004-11-07add some more r300 pci idsDave Airlie
2004-11-07respect cc and cflagsDave Airlie
2004-11-07Don't link in files which no longer exist.Eric Anholt
2004-11-07Now that the memory debug code is gone, and all 3 BSDs have M_ZERO, stopEric Anholt
using drm_alloc/drm_free in the core and instead use plain malloc/free.
2004-11-06Add the drm Makefile and update .cvsignores.Eric Anholt
2004-11-06Convert more drivers for bsd-core, moving the ioctl definitions to sharedEric Anholt
code. Remove the "drv" from sisdrv, as it's unnecessary. Use the drm_pci functions in i915 instead of per-os implementations of the same. Avoid whitespace within fields in drm_pciids.txt (one of the r300 definitions), since it breaks the bsd pciids script. Tested on sis, mga, r128. i915 needs more work.
2004-11-06Remove some core stuff that ended up being unnecessary.Eric Anholt
2004-11-06Get r128 basically working: Hook up the driver's dma ioctl, use the properEric Anholt
offset into the driver ioctl array, and don't make the ctx bitmap conditional.
2004-11-06Move the lock/unlock ioctls to a more logical place, in drm_lock.c.Eric Anholt
2004-11-06Connect up r128_ioctls in driver config.Eric Anholt
2004-11-06Move radeon i2c include to top of fileJon Smirl
2004-11-06Export missing r128 ioctl symbolJon Smirl
2004-11-06Fix Linux build. Why won't this complile? extern int const foo; staticJon Smirl
struct drm_driver driver = { .var = foo }; error says foo is not constant
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef __NOUVEAU_DRV_H__ #define __NOUVEAU_DRV_H__ #define DRIVER_AUTHOR "Stephane Marchesin" #define DRIVER_EMAIL "dri-devel@lists.sourceforge.net" #define DRIVER_NAME "nouveau" #define DRIVER_DESC "nVidia Riva/TNT/GeForce" #define DRIVER_DATE "20060213" #define DRIVER_MAJOR 0 #define DRIVER_MINOR 0 #define DRIVER_PATCHLEVEL 10 #define NOUVEAU_FAMILY 0x0000FFFF #define NOUVEAU_FLAGS 0xFFFF0000 #include "nouveau_drm.h" #include "nouveau_reg.h" struct mem_block { struct mem_block *next; struct mem_block *prev; uint64_t start; uint64_t size; struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */ int flags; drm_local_map_t *map; drm_handle_t map_handle; }; enum nouveau_flags { NV_NFORCE =0x10000000, NV_NFORCE2 =0x20000000 }; #define NVOBJ_ENGINE_SW 0 #define NVOBJ_ENGINE_GR 1 #define NVOBJ_ENGINE_INT 0xdeadbeef #define NVOBJ_FLAG_ALLOW_NO_REFS (1 << 0) #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) #define NVOBJ_FLAG_ZERO_FREE (1 << 2) #define NVOBJ_FLAG_FAKE (1 << 3) struct nouveau_gpuobj { struct list_head list; int im_channel; struct mem_block *im_pramin; struct mem_block *im_backing; int im_bound; uint32_t flags; int refcount; uint32_t engine; uint32_t class; void (*dtor)(struct drm_device *, struct nouveau_gpuobj *); void *priv; }; struct nouveau_gpuobj_ref { struct list_head list; struct nouveau_gpuobj *gpuobj; uint32_t instance; int channel; int handle; }; struct nouveau_channel { struct drm_device *dev; int id; /* owner of this fifo */ struct drm_file *file_priv; /* mapping of the fifo itself */ drm_local_map_t *map; /* mapping of the regs controling the fifo */ drm_local_map_t *regs; /* Fencing */ uint32_t next_sequence; /* DMA push buffer */ struct nouveau_gpuobj_ref *pushbuf; struct mem_block *pushbuf_mem; uint32_t pushbuf_base; /* FIFO user control regs */ uint32_t user, user_size; uint32_t put; uint32_t get; uint32_t ref_cnt; /* Notifier memory */ struct mem_block *notifier_block; struct mem_block *notifier_heap; drm_local_map_t *notifier_map; /* PFIFO context */ struct nouveau_gpuobj_ref *ramfc; /* PGRAPH context */ /* XXX may be merge 2 pointers as private data ??? */ struct nouveau_gpuobj_ref *ramin_grctx; void *pgraph_ctx; /* NV50 VM */ struct nouveau_gpuobj *vm_pd; struct nouveau_gpuobj_ref *vm_gart_pt; struct nouveau_gpuobj_ref *vm_vram_pt; /* Objects */ struct nouveau_gpuobj_ref *ramin; /* Private instmem */ struct mem_block *ramin_heap; /* Private PRAMIN heap */ struct nouveau_gpuobj_ref *ramht; /* Hash table */ struct list_head ramht_refs; /* Objects referenced by RAMHT */ }; struct nouveau_drm_channel { struct nouveau_channel *chan; /* DMA state */ int max, put, cur, free; int push_free; volatile uint32_t *pushbuf; /* Notifiers */ uint32_t notify0_offset; /* Buffer moves */ uint32_t m2mf_dma_source; uint32_t m2mf_dma_destin; }; struct nouveau_config { struct { int location; int size; } cmdbuf; }; struct nouveau_instmem_engine { void *priv; int (*init)(struct drm_device *dev); void (*takedown)(struct drm_device *dev); int (*populate)(struct drm_device *, struct nouveau_gpuobj *, uint32_t *size); void (*clear)(struct drm_device *, struct nouveau_gpuobj *); int (*bind)(struct drm_device *, struct nouveau_gpuobj *); int (*unbind)(struct drm_device *, struct nouveau_gpuobj *); }; struct nouveau_mc_engine { int (*init)(struct drm_device *dev); void (*takedown)(struct drm_device *dev); }; struct nouveau_timer_engine { int (*init)(struct drm_device *dev); void (*takedown)(struct drm_device *dev); uint64_t (*read)(struct drm_device *dev); }; struct nouveau_fb_engine { int (*init)(struct drm_device *dev); void (*takedown)(struct drm_device *dev); }; struct nouveau_fifo_engine { void *priv; int channels; int (*init)(struct drm_device *); void (*takedown)(struct drm_device *); int (*channel_id)(struct drm_device *); int (*create_context)(struct nouveau_channel *); void (*destroy_context)(struct nouveau_channel *); int (*load_context)(struct nouveau_channel *); int (*save_context)(struct nouveau_channel *); }; struct nouveau_pgraph_engine { int (*init)(struct drm_device *); void (*takedown)(struct drm_device *); int (*create_context)(struct nouveau_channel *); void (*destroy_context)(struct nouveau_channel *); int (*load_context)(struct nouveau_channel *); int (*save_context)(struct nouveau_channel *); }; struct nouveau_engine { struct nouveau_instmem_engine instmem; struct nouveau_mc_engine mc; struct nouveau_timer_engine timer; struct nouveau_fb_engine fb; struct nouveau_pgraph_engine graph; struct nouveau_fifo_engine fifo; }; #define NOUVEAU_MAX_CHANNEL_NR 128 struct drm_nouveau_private { enum { NOUVEAU_CARD_INIT_DOWN, NOUVEAU_CARD_INIT_DONE, NOUVEAU_CARD_INIT_FAILED } init_state; int ttm; /* the card type, takes NV_* as values */ int card_type; /* exact chipset, derived from NV_PMC_BOOT_0 */ int chipset; int flags; drm_local_map_t *mmio; drm_local_map_t *fb; drm_local_map_t *ramin; /* NV40 onwards */ int fifo_alloc_count; struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR]; struct nouveau_engine Engine; struct nouveau_drm_channel channel; /* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */ struct nouveau_gpuobj *ramht; uint32_t ramin_rsvd_vram; uint32_t ramht_offset; uint32_t ramht_size; uint32_t ramht_bits; uint32_t ramfc_offset; uint32_t ramfc_size; uint32_t ramro_offset; uint32_t ramro_size; /* base physical adresses */ uint64_t fb_phys; uint64_t fb_available_size; struct { enum { NOUVEAU_GART_NONE = 0, NOUVEAU_GART_AGP, NOUVEAU_GART_SGDMA } type; uint64_t aper_base; uint64_t aper_size; struct nouveau_gpuobj *sg_ctxdma; struct page *sg_dummy_page; dma_addr_t sg_dummy_bus; /* nottm hack */ struct drm_ttm_backend *sg_be; unsigned long sg_handle; } gart_info; /* G8x global VRAM page table */ struct nouveau_gpuobj *vm_vram_pt; /* the mtrr covering the FB */ int fb_mtrr; struct mem_block *agp_heap; struct mem_block *fb_heap; struct mem_block *fb_nomap_heap; struct mem_block *ramin_heap; struct mem_block *pci_heap; /* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */ uint32_t ctx_table_size; struct nouveau_gpuobj_ref *ctx_table; struct nouveau_config config; struct list_head gpuobj_list; }; #define NOUVEAU_CHECK_INITIALISED_WITH_RETURN do { \ struct drm_nouveau_private *nv = dev->dev_private; \ if (nv->init_state != NOUVEAU_CARD_INIT_DONE) { \ DRM_ERROR("called without init\n"); \ return -EINVAL; \ } \ } while(0) #define NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(id,cl,ch) do { \ struct drm_nouveau_private *nv = dev->dev_private; \ if (!nouveau_fifo_owner(dev, (cl), (id))) { \ DRM_ERROR("pid %d doesn't own channel %d\n", \ DRM_CURRENTPID, (id)); \ return -EPERM; \ } \ (ch) = nv->fifos[(id)]; \ } while(0) /* nouveau_state.c */ extern void nouveau_preclose(struct drm_device *dev, struct drm_file *); extern int nouveau_load(struct drm_device *, unsigned long flags); extern int nouveau_firstopen(struct drm_device *); extern void nouveau_lastclose(struct drm_device *); extern int nouveau_unload(struct drm_device *); extern int nouveau_ioctl_getparam(struct drm_device *, void *data, struct drm_file *); extern int nouveau_ioctl_setparam(struct drm_device *, void *data, struct drm_file *); extern void nouveau_wait_for_idle(struct drm_device *); extern int nouveau_card_init(struct drm_device *); extern int nouveau_ioctl_card_init(struct drm_device *, void *data, struct drm_file *); /* nouveau_mem.c */ extern int nouveau_mem_init_heap(struct mem_block **, uint64_t start, uint64_t size); extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *, uint64_t size, int align2, struct drm_file *); extern void nouveau_mem_takedown(struct mem_block **heap); extern void nouveau_mem_free_block(struct mem_block *); extern uint64_t nouveau_mem_fb_amount(struct drm_device *); extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap); extern int nouveau_ioctl_mem_alloc(struct drm_device *, void *data, struct drm_file *); extern int nouveau_ioctl_mem_free(struct drm_device *, void *data, struct drm_file *); extern struct mem_block* nouveau_mem_alloc(struct drm_device *, int alignment, uint64_t size, int flags, struct drm_file *); extern void nouveau_mem_free(struct drm_device *dev, struct mem_block*); extern int nouveau_mem_init(struct drm_device *); extern int nouveau_mem_init_ttm(struct drm_device *); extern void nouveau_mem_close(struct drm_device *); /* nouveau_notifier.c */ extern int nouveau_notifier_init_channel(struct nouveau_channel *); extern void nouveau_notifier_takedown_channel(struct nouveau_channel *); extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, int cout, uint32_t *offset); extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data, struct drm_file *); extern int nouveau_ioctl_notifier_free(struct drm_device *, void *data, struct drm_file *); /* nouveau_fifo.c */ extern int nouveau_fifo_init(struct drm_device *); extern int nouveau_fifo_ctx_size(struct drm_device *); extern void nouveau_fifo_cleanup(struct drm_device *, struct drm_file *); extern int nouveau_fifo_owner(struct drm_device *, struct drm_file *, int channel); extern int nouveau_fifo_alloc(struct drm_device *dev, struct nouveau_channel **chan, struct drm_file *file_priv, struct mem_block *pushbuf, uint32_t fb_ctxdma, uint32_t tt_ctxdma); extern void nouveau_fifo_free(struct nouveau_channel *); /* nouveau_object.c */ extern int nouveau_gpuobj_early_init(struct drm_device *); extern int nouveau_gpuobj_init(struct drm_device *); extern void nouveau_gpuobj_takedown(struct drm_device *); extern void nouveau_gpuobj_late_takedown(struct drm_device *); extern int nouveau_gpuobj_channel_init(struct nouveau_channel *, uint32_t vram_h, uint32_t tt_h); extern void nouveau_gpuobj_channel_takedown(struct nouveau_channel *); extern int nouveau_gpuobj_new(struct drm_device *, struct nouveau_channel *, int size, int align, uint32_t flags, struct nouveau_gpuobj **); extern int nouveau_gpuobj_del(struct drm_device *, struct nouveau_gpuobj **); extern int nouveau_gpuobj_ref_add(struct drm_device *, struct nouveau_channel *, uint32_t handle, struct nouveau_gpuobj *, struct nouveau_gpuobj_ref **); extern int nouveau_gpuobj_ref_del(struct drm_device *, struct nouveau_gpuobj_ref **); extern int nouveau_gpuobj_ref_find(struct nouveau_channel *, uint32_t handle, struct nouveau_gpuobj_ref **ref_ret); extern int nouveau_gpuobj_new_ref(struct drm_device *, struct nouveau_channel *alloc_chan, struct nouveau_channel *ref_chan, uint32_t handle, int size, int align, uint32_t flags, struct nouveau_gpuobj_ref **); extern int nouveau_gpuobj_new_fake(struct drm_device *, uint32_t p_offset, uint32_t b_offset, uint32_t size, uint32_t flags, struct nouveau_gpuobj **, struct nouveau_gpuobj_ref**); extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class, uint64_t offset, uint64_t size, int access, int target, struct nouveau_gpuobj **); extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *, uint64_t offset, uint64_t size, int access, struct nouveau_gpuobj **, uint32_t *o_ret); extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class, struct nouveau_gpuobj **); extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data, struct drm_file *); extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data, struct drm_file *); /* nouveau_irq.c */ extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS); extern void nouveau_irq_preinstall(struct drm_device *); extern int nouveau_irq_postinstall(struct drm_device *); extern void nouveau_irq_uninstall(struct drm_device *); /* nouveau_sgdma.c */ extern int nouveau_sgdma_init(struct drm_device *); extern void nouveau_sgdma_takedown(struct drm_device *); extern int nouveau_sgdma_get_page(struct drm_device *, uint32_t offset, uint32_t *page); extern struct drm_ttm_backend *nouveau_sgdma_init_ttm(struct drm_device *); extern int nouveau_sgdma_nottm_hack_init(struct drm_device *); extern void nouveau_sgdma_nottm_hack_takedown(struct drm_device *); /* nouveau_dma.c */ extern int nouveau_dma_channel_init(struct drm_device *); extern void nouveau_dma_channel_takedown(struct drm_device *); extern int nouveau_dma_wait(struct drm_device *, int size); /* nv04_fb.c */ extern int nv04_fb_init(struct drm_device *); extern void nv04_fb_takedown(struct drm_device *); /* nv10_fb.c */ extern int nv10_fb_init(struct drm_device *); extern void nv10_fb_takedown(struct drm_device *); /* nv40_fb.c */ extern int nv40_fb_init(struct drm_device *); extern void nv40_fb_takedown(struct drm_device *); /* nv04_fifo.c */ extern int nv04_fifo_channel_id(struct drm_device *); extern int nv04_fifo_create_context(struct nouveau_channel *); extern void nv04_fifo_destroy_context(struct nouveau_channel *); extern int nv04_fifo_load_context(struct nouveau_channel *); extern int nv04_fifo_save_context(struct nouveau_channel *); /* nv10_fifo.c */ extern int nv10_fifo_channel_id(struct drm_device *); extern int nv10_fifo_create_context(struct nouveau_channel *); extern void nv10_fifo_destroy_context(struct nouveau_channel *); extern int nv10_fifo_load_context(struct nouveau_channel *); extern int nv10_fifo_save_context(struct nouveau_channel *); /* nv40_fifo.c */ extern int nv40_fifo_init(struct drm_device *); extern int nv40_fifo_create_context(struct nouveau_channel *); extern void nv40_fifo_destroy_context(struct nouveau_channel *); extern int nv40_fifo_load_context(struct nouveau_channel *); extern int nv40_fifo_save_context(struct nouveau_channel *); /* nv50_fifo.c */ extern int nv50_fifo_init(struct drm_device *); extern void nv50_fifo_takedown(struct drm_device *); extern int nv50_fifo_channel_id(struct drm_device *); extern int nv50_fifo_create_context(struct nouveau_channel *); extern void nv50_fifo_destroy_context(struct nouveau_channel *); extern int nv50_fifo_load_context(struct nouveau_channel *); extern int nv50_fifo_save_context(struct nouveau_channel *); /* nv04_graph.c */ extern void nouveau_nv04_context_switch(struct drm_device *); extern int nv04_graph_init(struct drm_device *); extern void nv04_graph_takedown(struct drm_device *); extern int nv04_graph_create_context(struct nouveau_channel *); extern void nv04_graph_destroy_context(struct nouveau_channel *); extern int nv04_graph_load_context(struct nouveau_channel *); extern int nv04_graph_save_context(struct nouveau_channel *); /* nv10_graph.c */ extern void nouveau_nv10_context_switch(struct drm_device *); extern int nv10_graph_init(struct drm_device *); extern void nv10_graph_takedown(struct drm_device *); extern int nv10_graph_create_context(struct nouveau_channel *); extern void nv10_graph_destroy_context(struct nouveau_channel *); extern int nv10_graph_load_context(struct nouveau_channel *); extern int nv10_graph_save_context(struct nouveau_channel *); /* nv20_graph.c */ extern int nv20_graph_create_context(struct nouveau_channel *); extern void nv20_graph_destroy_context(struct nouveau_channel *); extern int nv20_graph_load_context(struct nouveau_channel *); extern int nv20_graph_save_context(struct nouveau_channel *); extern int nv20_graph_init(struct drm_device *); extern void nv20_graph_takedown(struct drm_device *); extern int nv30_graph_init(struct drm_device *); /* nv40_graph.c */ extern int nv40_graph_init(struct drm_device *); extern void nv40_graph_takedown(struct drm_device *); extern int nv40_graph_create_context(struct nouveau_channel *); extern void nv40_graph_destroy_context(struct nouveau_channel *); extern int nv40_graph_load_context(struct nouveau_channel *); extern int nv40_graph_save_context(struct nouveau_channel *); /* nv50_graph.c */ extern int nv50_graph_init(struct drm_device *); extern void nv50_graph_takedown(struct drm_device *); extern int nv50_graph_create_context(struct nouveau_channel *); extern void nv50_graph_destroy_context(struct nouveau_channel *); extern int nv50_graph_load_context(struct nouveau_channel *); extern int nv50_graph_save_context(struct nouveau_channel *); /* nv04_instmem.c */ extern int nv04_instmem_init(struct drm_device *); extern void nv04_instmem_takedown(struct drm_device *); extern int nv04_instmem_populate(struct drm_device *, struct nouveau_gpuobj *, uint32_t *size); extern void nv04_instmem_clear(struct drm_device *, struct nouveau_gpuobj *); extern int nv04_instmem_bind(struct drm_device *, struct nouveau_gpuobj *); extern int nv04_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *); /* nv50_instmem.c */ extern int nv50_instmem_init(struct drm_device *); extern void nv50_instmem_takedown(struct drm_device *); extern int nv50_instmem_populate(struct drm_device *, struct nouveau_gpuobj *, uint32_t *size); extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *); extern int nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *); extern int nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *); /* nv04_mc.c */ extern int nv04_mc_init(struct drm_device *); extern void nv04_mc_takedown(struct drm_device *); /* nv40_mc.c */ extern int nv40_mc_init(struct drm_device *); extern void nv40_mc_takedown(struct drm_device *); /* nv50_mc.c */ extern int nv50_mc_init(struct drm_device *); extern void nv50_mc_takedown(struct drm_device *); /* nv04_timer.c */ extern int nv04_timer_init(struct drm_device *); extern uint64_t nv04_timer_read(struct drm_device *); extern void nv04_timer_takedown(struct drm_device *); extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg); /* nouveau_buffer.c */ extern struct drm_bo_driver nouveau_bo_driver; /* nouveau_fence.c */ extern struct drm_fence_driver nouveau_fence_driver; extern void nouveau_fence_handler(struct drm_device *dev, int channel); #if defined(__powerpc__) #define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) ) #define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) ) #else #define NV_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) #define NV_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) #endif /* PRAMIN access */ #if defined(__powerpc__) #define NV_RI32(o) in_be32((void __iomem *)(dev_priv->ramin)->handle+(o)) #define NV_WI32(o,v) out_be32((void __iomem*)(dev_priv->ramin)->handle+(o), (v)) #else