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AgeCommit message (Expand)Author
2007-11-02nouveau: Add darktama's fencing code. Restructure some stuff.Jeremy Kolb
2007-11-02nouveau: incorporate darktama's buffer object work.Jeremy Kolb
2007-11-02nouveau: more filling in for ttm. Change copyright since it's based off of r...Jeremy Kolb
2007-11-02User buffer support.Thomas Hellstrom
2007-11-02Return fence errors.Thomas Hellstrom
2007-11-03radeon: set the address to access the aperture on the CPU side correctlyDave Airlie
2007-11-01Use unsigned long instead of u64 in drm_modeset_ctl_tJesse Barnes
2007-11-01Cleanup vblank_init and fix drm_irq_installJesse Barnes
2007-11-01nouveau: don't use AGP on PPC. It's a hopeless case.Stephane Marchesin
2007-10-31nouveau: add missing file.Jeremy Kolb
2007-10-31Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drmJeremy Kolb
2007-10-31nouveau: ttm stubsJeremy Kolb
2007-11-01drm/ttm: add support for cached un-snooped mappings.Dave Airlie
2007-11-01i915: fix compat code on 965/g33Dave Airlie
2007-10-31drm: add chipset flushing via agp supportDave Airlie
2007-10-31i915: add backwards compat chipset flushing codeDave Airlie
2007-10-31drm: call driver load after initing agp subsystemDave Airlie
2007-10-30Merge branch 'master' into vblank-rework, fixup remaining driversJesse Barnes
2007-10-30Nouveau: add a comment about SKIPS for next API breakage.Stephane Marchesin
2007-10-30Nouveau: fold some loops.Stephane Marchesin
2007-10-30drm/i915: add driver cache flush entry pointDave Airlie
2007-10-29Move struct drm_drawable_info out of public header file.Kristian Høgsberg
2007-10-29Remove unused memory save areasJesse Barnes
2007-10-28nouveau: don't touch PMC_BOOT_1 on x86, it seems to be undefined on some earl...Stephane Marchesin
2007-10-26i915: suspend/resume supportJesse Barnes
2007-10-26update DRM sysfs supportJesse Barnes
2007-10-26nouveau: flip the CHECK_STATE bit off on nv30. This lets you do 8-bit surface...Stephane Marchesin
2007-10-26Minor libdrm fixes.Thomas Hellstrom
2007-10-26Buffer flags and masks are 64-bit.Thomas Hellstrom
2007-10-25Initial pass at porting MGA to vblank-reworkIan Romanick
2007-10-25Tighten permissions on some buffer manager ioctls.Thomas Hellstrom
2007-10-25Buffer manager:Thomas Hellstrom
2007-10-25Fix buffer object flag / mask checking.Thomas Hellstrom
2007-10-25Merge branch 'master' into drm-ttm-finalizeThomas Hellstrom
2007-10-25i915: relocate buffers before validation add memory barrier between twoDave Airlie
2007-10-25i915: remove relocatee kernel mapping sooner stops mutex taking during sleepDave Airlie
2007-10-25missing mutex unlock bugRoel Kluin
2007-10-24Fix missing \n on some DRM_ERROR in i915_dma.cEric Anholt
2007-10-24i915: use a drm memory barrier defineDave Airlie
2007-10-23i915: require mfence before submitting batchbufferDave Airlie
2007-10-23nouveau: fix IGPStephane Marchesin
2007-10-22Remove duplicate file.Thomas Hellstrom
2007-10-22Don't clobber the unfenced list with DONT_FENCE operations.Thomas Hellstrom
2007-10-22A cmdbuf mutex to implement validate-submit-fence atomicity in the absenceThomas Hellstrom
2007-10-22Setstatus header.Thomas Hellstrom
2007-10-22i915: split reloc execution into separate functionDave Airlie
2007-10-21Get the lock flags right in libdrm.Thomas Hellstrom
2007-10-21Disable i915 accelerated blit copy moves for now until we canThomas Hellstrom
2007-10-21Adapt i915 super-ioctl for lock-free operation.Thomas Hellstrom
2007-10-21Remove the need for the hardware lock in the buffer manager.Thomas Hellstrom
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-19 21:45:11 +0000
c->crtc_offset); if (lock) cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK; else cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK; RADEON_WRITE(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); } else { switch(radeon_crtc->crtc_id) { case 0: cur_lock = RADEON_READ(RADEON_CUR_OFFSET); if (lock) cur_lock |= RADEON_CUR_LOCK; else cur_lock &= ~RADEON_CUR_LOCK; RADEON_WRITE(RADEON_CUR_OFFSET, cur_lock); break; case 1: cur_lock = RADEON_READ(RADEON_CUR2_OFFSET); if (lock) cur_lock |= RADEON_CUR2_LOCK; else cur_lock &= ~RADEON_CUR2_LOCK; RADEON_WRITE(RADEON_CUR2_OFFSET, cur_lock); break; default: break; } } } static void radeon_hide_cursor(struct drm_crtc *crtc) { struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); struct drm_radeon_private *dev_priv = crtc->dev->dev_private; if (radeon_is_avivo(dev_priv)) { RADEON_WRITE(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); RADEON_WRITE_P(RADEON_MM_DATA, 0, ~AVIVO_D1CURSOR_EN); } else { switch(radeon_crtc->crtc_id) { case 0: RADEON_WRITE(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL); break; case 1: RADEON_WRITE(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL); break; default: return; } RADEON_WRITE_P(RADEON_MM_DATA, 0, ~RADEON_CRTC_CUR_EN); } } static void radeon_show_cursor(struct drm_crtc *crtc) { struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); struct drm_radeon_private *dev_priv = crtc->dev->dev_private; if (radeon_is_avivo(dev_priv)) { RADEON_WRITE(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); RADEON_WRITE(RADEON_MM_DATA, AVIVO_D1CURSOR_EN | (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT)); } else { switch(radeon_crtc->crtc_id) { case 0: RADEON_WRITE(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL); break; case 1: RADEON_WRITE(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL); break; default: return; } RADEON_WRITE_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN | (RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)), ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK)); } } static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj, uint32_t width, uint32_t height) { struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); struct drm_radeon_private *dev_priv = crtc->dev->dev_private; struct drm_radeon_gem_object *obj_priv; obj_priv = obj->driver_private; if (radeon_is_avivo(dev_priv)) { RADEON_WRITE(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, dev_priv->fb_location + obj_priv->bo->offset); RADEON_WRITE(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset, (width - 1) << 16 | (height - 1)); } else { switch(radeon_crtc->crtc_id) { case 0: /* offset is from DISP_BASE_ADDRESS */ RADEON_WRITE(RADEON_CUR_OFFSET, obj_priv->bo->offset); break; case 1: /* offset is from DISP2_BASE_ADDRESS */ RADEON_WRITE(RADEON_CUR2_OFFSET, obj_priv->bo->offset); break; default: break; } } } int radeon_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, uint32_t handle, uint32_t width, uint32_t height) { struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); struct drm_gem_object *obj; if (!handle) { /* turn off cursor */ radeon_hide_cursor(crtc); return 0; } obj = drm_gem_object_lookup(crtc->dev, file_priv, handle); if (!obj) { DRM_ERROR("Cannot find cursor object %x for crtc %d\n", handle, radeon_crtc->crtc_id); return -EINVAL; } if ((width > CURSOR_WIDTH) || (height > CURSOR_HEIGHT)) { DRM_ERROR("bad cursor width or height %d x %d\n", width, height); return -EINVAL; } radeon_lock_cursor(crtc, true); // XXX only 27 bit offset for legacy cursor radeon_set_cursor(crtc, obj, width, height); radeon_show_cursor(crtc); radeon_lock_cursor(crtc, false); mutex_lock(&crtc->dev->struct_mutex); drm_gem_object_unreference(obj); mutex_unlock(&crtc->dev->struct_mutex); return 0; } int radeon_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) { struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); struct drm_radeon_private *dev_priv = crtc->dev->dev_private; int xorigin = 0, yorigin = 0; if (x < 0) xorigin = -x + 1;