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AgeCommit message (Expand)Author
2004-04-10white space changes to align with kernelDave Airlie
2004-04-10include highmem.hDave Airlie
2004-04-10update gamma_dma with patch from davej in 2.6Dave Airlie
2004-04-10patch from Andrew Morton tree from Arjan van de Ven fixes some oopses seenDave Airlie
2004-04-10align code with Linux kernel.Dave Airlie
2004-04-10remove unused codeDave Airlie
2004-04-10update from linux kernel for ia64Dave Airlie
2004-04-09remove ImakefileAlan Hourihane
2004-04-08fix build problemAlan Hourihane
2004-04-08disable PCI DMA ioctls as they are not used currently until SAVAGE_CMD_DMAAlan Hourihane
2004-04-08big whitespace .. this aligns all the whitespace in this file with the bkDave Airlie
2004-04-082.6 sysfs patches + stubs in drmP.h for 2.4 compatibilityDave Airlie
2004-04-08long dev_t patches from 2.6 treeDave Airlie
2004-04-082.6 patches for larger dev_tDave Airlie
2004-04-08more 2.4 compat fnsDave Airlie
2004-04-08patch from Linux kernel 2.6.5Dave Airlie
2004-04-08fixes from Linux kernelDave Airlie
2004-04-08patch from lkDave Airlie
2004-03-31VIA module fixes:Thomas Hellstrom
2004-03-26copy correct MakefileDave Airlie
2004-03-26Added via driver to drm/linux/Config.in Reported by: Terry BarnabyThomas Hellstrom
2004-03-24Exported symbols cause compilation failure of via_mm.c on 2.4 kernels.Thomas Hellstrom
2004-03-24Modified linux/Kconfig to include the via drm driver.Thomas Hellstrom
2004-03-23Merged via-1-2-0: Altered Makefiles in drm/linuxThomas Hellstrom
2004-03-23Merged via-1-2-0Thomas Hellstrom
2004-03-23make sure in DRM toplevelDave Airlie
2004-03-23initial shell script to create linux kernel drm from the DRI oneDave Airlie
2004-03-17Adjust shared path in makefile XFree86 bug: Reported by: Submitted by:Jon Smirl
2004-03-16Makefile the makefile really clean everything XFree86 bug: Reported by:Jon Smirl
2004-03-16Add a missing ifdef CTX to get rid of the waring in the gamma driver build.Jon Smirl
2004-03-12Fixes need to clean up the mess I made with the mesa merge. This codeJon Smirl
2004-02-28Remove extraneous code accidentally added with revision 1.86Michel Daenzer
2004-02-28More differentiated error codes for DRM(agp_acquire)Michel Daenzer
2004-02-24Use DO_MUNMAP_4_ARGS macro defined in Makefile.linux (Steve Holland).Felix Kuehling
2004-02-22Merged the Savage DRM driver from the savage-2-0-0-branch into the trunk.Felix Kuehling
2004-02-21Conditionally add definition of list_for_each_entry_safe for kernelFelix Kuehling
2004-02-20drm_ctx_dtor.patch Submitted by: Erdi ChenKeith Whitwell
2004-02-18Fix sisfb header location for 2.6 kernelsMichel Daenzer
2004-01-11Adapt to nopage() prototype change in Linux 2.6.1.Michel Daenzer
2004-01-10Make sure that all state packets are handled inMichel Daenzer
2004-01-10R200_PP_CUBIC_OFFSET_F1_[0-6] state packets only contain 5 offsets, not 6Michel Daenzer
2004-01-06Fix some misuse of NULL where 0 is intended.Eric Anholt
2003-12-16Don't ioremap the framebuffer area. The ioremapped area wasn't used byEric Anholt
2003-12-16Add a collection of Radeon and R128 PCI IDs, including the IGP chipsets.Eric Anholt
2003-12-08Add i865 pci idKeith Whitwell
2003-11-12Fix a locking nit, and add asserts in some things that should be calledEric Anholt
2003-11-06Return EBUSY when attempting to addmap a DRM_SHM area with a lock in it ifEric Anholt
2003-11-06Remove unused variable.Eric Anholt
2003-11-05Changes to DRM(irq_install)...... wrap dev->dma usage with __HAVE_DMA inAlan Hourihane
2003-11-05- Tie the DRM to a specific device: setunique no longer succeeds when givenEric Anholt
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-22 12:25:04 +0000
ruct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<<chan->id)); nouveau_gpuobj_ref_del(dev, &chan->ramfc); } int nv10_fifo_load_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp; NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id); NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET , RAMFC_RD(DMA_GET)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT , RAMFC_RD(DMA_PUT)); NV_WRITE(NV10_PFIFO_CACHE1_REF_CNT , RAMFC_RD(REF_CNT)); tmp = RAMFC_RD(DMA_INSTANCE); NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE , tmp & 0xFFFF); NV_WRITE(NV04_PFIFO_CACHE1_DMA_DCOUNT , tmp >> 16); NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE , RAMFC_RD(DMA_STATE)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_FETCH , RAMFC_RD(DMA_FETCH)); NV_WRITE(NV04_PFIFO_CACHE1_ENGINE , RAMFC_RD(ENGINE)); NV_WRITE(NV04_PFIFO_CACHE1_PULL1 , RAMFC_RD(PULL1_ENGINE)); if (dev_priv->chipset >= 0x17) { NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_VALUE, RAMFC_RD(ACQUIRE_VALUE)); NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP, RAMFC_RD(ACQUIRE_TIMESTAMP)); NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT, RAMFC_RD(ACQUIRE_TIMEOUT)); NV_WRITE(NV10_PFIFO_CACHE1_SEMAPHORE, RAMFC_RD(SEMAPHORE)); NV_WRITE(NV10_PFIFO_CACHE1_DMA_SUBROUTINE, RAMFC_RD(DMA_SUBROUTINE)); } /* Reset NV04_PFIFO_CACHE1_DMA_CTL_AT_INFO to INVALID */ tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_CTL) & ~(1<<31); NV_WRITE(NV04_PFIFO_CACHE1_DMA_CTL, tmp); return 0; } int nv10_fifo_save_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp; RAMFC_WR(DMA_PUT , NV_READ(NV04_PFIFO_CACHE1_DMA_PUT)); RAMFC_WR(DMA_GET , NV_READ(NV04_PFIFO_CACHE1_DMA_GET)); RAMFC_WR(REF_CNT , NV_READ(NV10_PFIFO_CACHE1_REF_CNT)); tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_INSTANCE) & 0xFFFF; tmp |= (NV_READ(NV04_PFIFO_CACHE1_DMA_DCOUNT) << 16); RAMFC_WR(DMA_INSTANCE , tmp); RAMFC_WR(DMA_STATE , NV_READ(NV04_PFIFO_CACHE1_DMA_STATE)); RAMFC_WR(DMA_FETCH , NV_READ(NV04_PFIFO_CACHE1_DMA_FETCH)); RAMFC_WR(ENGINE , NV_READ(NV04_PFIFO_CACHE1_ENGINE)); RAMFC_WR(PULL1_ENGINE , NV_READ(NV04_PFIFO_CACHE1_PULL1)); if (dev_priv->chipset >= 0x17) { RAMFC_WR(ACQUIRE_VALUE, NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_VALUE)); RAMFC_WR(ACQUIRE_TIMESTAMP, NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP)); RAMFC_WR(ACQUIRE_TIMEOUT, NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT)); RAMFC_WR(SEMAPHORE, NV_READ(NV10_PFIFO_CACHE1_SEMAPHORE)); RAMFC_WR(DMA_SUBROUTINE, NV_READ(NV04_PFIFO_CACHE1_DMA_GET)); } return 0; }
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-22 12:25:04 +0000