renesas/drm.git - libdrm, cloned from git://anongit.freedesktop.org/mesa/drm

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author	Dave Airlie <airlied@redhat.com>	2008-02-20 13:27:10 +1000
committer	Dave Airlie <airlied@redhat.com>	2008-02-22 13:49:51 +1000
commit	cdad850ebc3570e5ff5a0996f36832c965aa8a1d (patch)
tree	4e084d4a2be9ba4c3ac90f708c32255b4f823f64 /tests/drmtest.c
parent	0d1cb1e8408d497fec66d9f31603f93800049c75 (diff)

add ioctl to get back memory managed area sized - used for kernel inited areas

Diffstat (limited to 'tests/drmtest.c')

0 files changed, 0 insertions, 0 deletions

/************************************************************************** * * Copyright 2007 Dave Airlie * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * **************************************************************************/ /* * Authors: Dave Airlie <airlied@linux.ie> */ #include "drmP.h" #include "radeon_drm.h" #include "radeon_drv.h" struct drm_ttm_backend *radeon_create_ttm_backend_entry(struct drm_device * dev) { drm_radeon_private_t *dev_priv = dev->dev_private; if(dev_priv->flags & RADEON_IS_AGP) return drm_agp_init_ttm(dev); else return ati_pcigart_init_ttm(dev, &dev_priv->gart_info, radeon_gart_flush); } int radeon_fence_types(struct drm_buffer_object *bo, uint32_t * class, uint32_t * type) { *class = 0; *type = 1; return 0; } int radeon_invalidate_caches(struct drm_device * dev, uint64_t flags) { drm_radeon_private_t *dev_priv = dev->dev_private; RING_LOCALS; if (!dev_priv->cp_running) return 0; BEGIN_RING(4); RADEON_FLUSH_CACHE(); RADEON_FLUSH_ZCACHE(); ADVANCE_RING(); COMMIT_RING(); return 0; } int radeon_init_mem_type(struct drm_device * dev, uint32_t type, struct drm_mem_type_manager * man) { drm_radeon_private_t *dev_priv = dev->dev_private; switch (type) { case DRM_BO_MEM_LOCAL: man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_MEMTYPE_CACHED; man->drm_bus_maptype = 0; break; case DRM_BO_MEM_VRAM: man->flags = _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_NEEDS_IOREMAP; man->io_addr = NULL; man->drm_bus_maptype = _DRM_FRAME_BUFFER; man->io_offset = drm_get_resource_start(dev, 0); man->io_size = drm_get_resource_len(dev, 0); break; case DRM_BO_MEM_TT: if (dev_priv->flags & RADEON_IS_AGP) { if (!(drm_core_has_AGP(dev) && dev->agp)) { DRM_ERROR("AGP is not enabled for memory type %u\n", (unsigned)type); return -EINVAL; } man->io_offset = dev->agp->agp_info.aper_base; man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024; man->io_addr = NULL; man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP; man->drm_bus_maptype = _DRM_AGP; } else { man->io_offset = dev_priv->gart_vm_start; man->io_size = dev_priv->gart_size; man->io_addr = NULL; man->flags = _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_MEMTYPE_CMA; man->drm_bus_maptype = _DRM_SCATTER_GATHER; } break; default: DRM_ERROR("Unsupported memory type %u\n", (unsigned)type); return -EINVAL; } return 0; } static void radeon_emit_copy_blit(struct drm_device * dev, uint32_t src_offset, uint32_t dst_offset, uint32_t pages, int direction) { uint32_t cur_pages; uint32_t stride = PAGE_SIZE; drm_radeon_private_t *dev_priv = dev->dev_private; uint32_t format, height; RING_LOCALS; if (!dev_priv) return; /* 32-bit copy format */ format = RADEON_COLOR_FORMAT_ARGB8888; /* radeon limited to 16k stride */ stride &= 0x3fff; while(pages > 0) { cur_pages = pages; if (cur_pages > 2048) cur_pages = 2048; pages -= cur_pages; /* needs verification */ BEGIN_RING(7); OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT_MULTI, 5)); OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL | RADEON_GMC_DST_PITCH_OFFSET_CNTL | RADEON_GMC_BRUSH_NONE | (format << 8) | RADEON_GMC_SRC_DATATYPE_COLOR | RADEON_ROP3_S | RADEON_DP_SRC_SOURCE_MEMORY | RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS); if (direction) { OUT_RING((stride << 22) | (src_offset >> 10)); OUT_RING((stride << 22) | (dst_offset >> 10)); } else { OUT_RING((stride << 22) | (dst_offset >> 10)); OUT_RING((stride << 22) | (src_offset >> 10)); } OUT_RING(0); OUT_RING(pages); /* x - y */ OUT_RING((stride << 16) | cur_pages); ADVANCE_RING(); } BEGIN_RING(2); RADEON_WAIT_UNTIL_2D_IDLE(); ADVANCE_RING(); return; } static int radeon_move_blit(struct drm_buffer_object * bo, int evict, int no_wait, struct drm_bo_mem_reg *new_mem) { struct drm_bo_mem_reg *old_mem = &bo->mem; int dir = 0; if ((old_mem->mem_type == new_mem->mem_type) && (new_mem->mm_node->start < old_mem->mm_node->start + old_mem->mm_node->size)) {


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