renesas/drm.git/include, branch master libdrm, cloned from git://anongit.freedesktop.org/mesa/drm Add blob property create/destroy ioctl wrappers 2015-06-29T18:19:22+00:00 Daniel Stone daniels@collabora.com 2015-06-22T16:26:03+00:00 32471b265c6fbce6d519f0420a0ffeb608296502 v2: Use memclear to zero out structure. Signed-off-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Rob Clark <robclark@freedesktop.org> 
v2: Use memclear to zero out structure.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Support atomic modesetting ioctl 2015-06-29T18:01:19+00:00 Ville Syrjälä ville.syrjala@linux.intel.com 2015-06-22T16:26:02+00:00 ed44e0b9585c563905447eceed12af9c1c7ca8d4 Add support for the atomic modesetting ioctl through a property-set API. v1: Squashed intermediate patches from Ville, Rob and myself. Updated for current kernel interface (no blobs). v2: Rewrite user-facing API to provide transactional/cursor interface. Use memclear to zero out ioctl. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Rob Clark <robclark@freedesktop.org> Signed-off-by: Daniel Stone <daniels@collabora.com> v3 [Emil Velikov]: Remove DRM_CAP_ATOMIC - superseded by DRM_CLIENT_CAP_ATOMIC. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> 
Add support for the atomic modesetting ioctl through a property-set API.

v1: Squashed intermediate patches from Ville, Rob and myself. Updated
    for current kernel interface (no blobs).
v2: Rewrite user-facing API to provide transactional/cursor interface.
    Use memclear to zero out ioctl.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Daniel Stone <daniels@collabora.com>

v3 [Emil Velikov]: Remove DRM_CAP_ATOMIC - superseded by
DRM_CLIENT_CAP_ATOMIC.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
nouveau: add coherent BO attribute 2015-05-21T18:20:29+00:00 Alexandre Courbot acourbot@nvidia.com 2015-05-21T06:08:28+00:00 a1acffd4e0968ffa65b673163574188a00c9ab7e Add a flag allowing Nouveau to specify that an object should be coherent at allocation time. This is required for some class of objects like fences which are randomly-accessed by both the CPU and GPU. This flag instructs the kernel driver to make sure the object remains coherent even on architectures for which coherency is not guaranteed by the bus. Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> 
Add a flag allowing Nouveau to specify that an object should be coherent
at allocation time. This is required for some class of objects like
fences which are randomly-accessed by both the CPU and GPU. This flag
instructs the kernel driver to make sure the object remains coherent
even on architectures for which coherency is not guaranteed by the bus.

Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
intel: Merge latest i915_drm.h 2015-03-19T17:19:46+00:00 Neil Roberts neil@linux.intel.com 2015-03-19T17:11:08+00:00 8576527cfacaf42af8316e1030c192193e94225a The main incentive to do this is to get I915_PARAM_REVISION. v2: Rebase on top of some changes that were made to the header without copying the whole file from the kernel source. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Neil Roberts <neil@linux.intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> 
The main incentive to do this is to get I915_PARAM_REVISION.

v2: Rebase on top of some changes that were made to the header without
    copying the whole file from the kernel source.

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
intel: Export total subslice and EU counts 2015-03-18T18:15:37+00:00 Jeff McGee jeff.mcgee@intel.com 2015-03-09T23:13:03+00:00 d556e068a7e4e9dfb57514244ae5f3e0eb9d0b39 Update kernel interface with new I915_GETPARAM ioctl entries for subslice total and EU total. Add a wrapping function for each parameter. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID. The kernel detection of these values is device-specific. Userspace drivers should continue to maintain ID-based tables for older devices which return ENODEV when using this query. v2: remove unnecessary include of <stdbool.h> and increment the I915_GETPARAM indices to match updated kernel patch. For: VIZ-4636 Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> 
Update kernel interface with new I915_GETPARAM ioctl entries for
subslice total and EU total. Add a wrapping function for each
parameter. Userspace drivers need these values when constructing
GPGPU commands. This kernel query method is intended to replace
the PCI ID-based tables that userspace drivers currently maintain.
The kernel driver can employ fuse register reads as needed to
ensure the most accurate determination of GT config attributes.
This first became important with Cherryview in which the config
could differ between devices with the same PCI ID.

The kernel detection of these values is device-specific. Userspace
drivers should continue to maintain ID-based tables for older
devices which return ENODEV when using this query.

v2: remove unnecessary include of <stdbool.h> and increment the
    I915_GETPARAM indices to match updated kernel patch.

For: VIZ-4636
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Add new DRM_MODE_CONNECTOR and _ENCODER defines 2015-01-05T19:30:57+00:00 Adam Cheney acheney@nvidia.com 2014-12-16T17:22:38+00:00 566c3ce877a4be72697e15cdfc421ce965f7c37d Update drm_mode.h defines from kernel upstream for connector and encoder types to expose DSI and other newly defined types. Signed-off-by: Adam Cheney <acheney@nvidia.com> Signed-off-by: Rob Clark <robclark@freedesktop.org> 
Update drm_mode.h defines from kernel upstream for connector and
encoder types to expose DSI and other newly defined types.

Signed-off-by: Adam Cheney <acheney@nvidia.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
tegra: Add SET/GET_FLAGS IOCTLs 2014-11-27T16:20:32+00:00 Thierry Reding treding@nvidia.com 2014-06-10T10:41:58+00:00 7b5e65268962d277c4e9e623d284150a715c541c The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a buffer object after it has been allocated or imported. Flags associated with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS IOCTL. Signed-off-by: Thierry Reding <treding@nvidia.com> 
The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a
buffer object after it has been allocated or imported. Flags associated
with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS
IOCTL.

Signed-off-by: Thierry Reding <treding@nvidia.com>
tegra: Add GET/SET_TILING IOCTLs 2014-11-27T16:20:32+00:00 Thierry Reding treding@nvidia.com 2014-06-04T08:36:43+00:00 5ad2eef6eaed4ef90c25341a1c2278a0df5dafcc Currently the tiling parameters of buffer objects can only be set at allocation time, and only a single tiled mode is supported. This new DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also allows the tiling mode to be changed after the allocation. This will enable the Tegra DRM driver to import buffers from a GPU and directly scan them out by configuring the display controller appropriately. To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the current tiling mode of a buffer object. This is necessary when importing buffers via handle (as is done in Mesa for example) so that userspace can determine the proper parameters for the 2D or 3D engines. Signed-off-by: Thierry Reding <treding@nvidia.com> 
Currently the tiling parameters of buffer objects can only be set at
allocation time, and only a single tiled mode is supported. This new
DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also
allows the tiling mode to be changed after the allocation. This will
enable the Tegra DRM driver to import buffers from a GPU and directly
scan them out by configuring the display controller appropriately.

To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the
current tiling mode of a buffer object. This is necessary when importing
buffers via handle (as is done in Mesa for example) so that userspace
can determine the proper parameters for the 2D or 3D engines.

Signed-off-by: Thierry Reding <treding@nvidia.com>
libdrm: Add NVIDIA Tegra support 2014-11-27T16:05:35+00:00 Thierry Reding thierry.reding@avionic-design.de 2012-12-01T09:30:38+00:00 d6a4c2cbd11e357a9123f6d41f6d40d38e82e7f2 Add the libdrm_tegra helper library to encapsulate Tegra-specific interfaces to the DRM. Furthermore, Tegra is added to the list of supported chips in the modetest and vbltest programs. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 
Add the libdrm_tegra helper library to encapsulate Tegra-specific
interfaces to the DRM.

Furthermore, Tegra is added to the list of supported chips in the
modetest and vbltest programs.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
update signed/object prop types 2014-11-25T00:56:50+00:00 Rob Clark robclark@freedesktop.org 2013-10-12T16:16:44+00:00 fb4177046de19730a784c3c16e4b73aab0ec6e41 Signed-off-by: Rob Clark <robclark@freedesktop.org> 
Signed-off-by: Rob Clark <robclark@freedesktop.org>